Memory Device Dummy Word Line Voltage Control

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Solution Overview

Problem

Hot carriers in the border area between dummy word lines and word lines in memory devices cause programming disturbances, leading to incorrect programming of memory cells due to electrical coupling between the gate and drain of transistors, resulting in high error rates.

Innovation Solution

Applying different voltage levels at specific timings during a programming cycle, where the first voltage level is below the threshold voltage of transistors coupled to dummy word lines and the second and fourth voltage levels are above the threshold, helps reduce or eliminate hot carriers, thereby preventing programming disturbances.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If high-density memory device structures are used to increase storage capacity, then storage density is improved, but hot carrier effects in border areas increase causing programming disturbances

Engineering Contradiction:
Improvestorage densityVSAvoidprogramming accuracy
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent applies preliminary action by establishing different voltage levels for dummy word lines before the actual programming operation. Specifically, a first voltage level (below threshold) is applied to dummy word lines adjacent to word lines, and a second voltage level (above threshold) is applied to other dummy word lines, preparing the transistor states in advance to prevent hot carrier generation during subsequent programming

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent applies local quality by differentiating voltage levels based on the specific location of dummy word lines relative to word lines. Dummy word lines adjacent to word lines receive a different voltage level compared to other dummy word lines, creating localized electrical conditions that prevent hot carrier effects in critical border areas while maintaining normal operation elsewhere

Inventive Principle:
Principle #3Local quality

2Reliability

If voltage levels are differentiated for dummy word lines to reduce hot carriers, then programming disturbance is reduced, but control complexity increases

Engineering Contradiction:
Improveprogramming accuracyVSAvoidvoltage control complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies segmentation by dividing dummy word lines into two distinct groups based on their spatial relationship with word lines: those adjacent to word lines and those that are not. This segmentation allows different voltage levels to be applied to each group, managing complexity through systematic classification rather than uniform treatment

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces error rates and improves the efficiency of programming data in memory devices by ensuring accurate control over transistors and maintaining data integrity.

Implementation Method 1

providing a first voltage level to the plurality of word lines, providing a second voltage level to a first dummy word line of the plurality of dummy word lines, and providing a fourth voltage level to second dummy word lines

Methodology Applied
Scientific EffectVoltage-level controlled transistor switching: Electrical Resistance

Data Source

PatentUS10636496B2Memory device with programming cycle stages
Publication Date: 2020.04.28 MACRONIX INTERNATIONAL CO LTD
  • US10636496B2 patent drawing
  • US10636496B2 patent drawing
  • US10636496B2 patent drawing

AI summary

A memory device comprising: a memory cell array and a memory controller configured to program data to memory cells during a programming cycle using operations comprising: during a setup stage, providing a first voltage level to word lines, a second voltage level to a first dummy word line, and a fourth voltage level to second dummy word lines being different from the first dummy word line, wherein the first voltage level is lower than a threshold voltage of a first transistor coupled to the first dummy word line and the second voltage level and the fourth voltage are higher than the threshold voltage, during a program stage, providing a third voltage level to first word lines to program data to memory cells coupled to the first word lines, the second voltage level to the first dummy word line, and the fourth voltage level to the second dummy word lines.