Memory Dump Coordinator Serializes I/O to Prevent Peak Flow

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Solution Overview

Problem

Traditional memory dump processes are inefficient due to instantaneous peak flows of disk I/O transmission, leading to decreased performance, especially in multi-core processor systems where multiple logical CPUs operate independently, causing resource waste and the need for reentrant storage device drivers.

Innovation Solution

A method and apparatus for memory dump processing that invokes a first set of processing units to process a first stage of memory dump processing for each memory block, followed by subsequent processing stages, allowing for serial writing of memory blocks into a storage device, thereby avoiding peak disk I/O flows and eliminating the need for reentrant storage device drivers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multiple logical CPUs process memory blocks in parallel independently, then processing speed is improved, but instantaneous peak flow of disk I/O transmission occurs causing performance decrease

Engineering Contradiction:
Improveprocessing speedVSAvoiddisk I/O performance
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent introduces a coordinator component that acts as an intermediary between multiple logical CPUs and the storage device. This coordinator manages and schedules disk I/O operations, serializing access to the storage device while allowing multiple CPUs to continue processing memory blocks in parallel. The coordinator buffers and queues I/O requests, preventing instantaneous peak flows from overwhelming the storage subsystem.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The system dynamically adjusts the level of parallelism in disk I/O operations based on storage device capacity and current load conditions. The coordinator can adjust the number of concurrent I/O operations, queue depths, and scheduling policies in real-time to optimize performance while preventing overwhelming the storage subsystem.

Inventive Principle:
Principle #15Dynamics

2Productivity

If multiple logical CPUs perform disk I/O transmission simultaneously, then dump processing is accelerated, but resource waste occurs due to lack of coordination

Engineering Contradiction:
Improvedump processing speedVSAvoidcomputing resource waste
Core Design Contradiction:
ProductivityVSLoss of energy

Solution Approach 1:

The patent segments the memory dump processing into distinct stages: memory block processing by logical CPUs, coordination and scheduling by the coordinator, and actual disk I/O execution. This segmentation allows each component to specialize and operate efficiently, with the coordinator optimizing resource allocation and preventing redundant or wasted operations.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The coordinator ensures continuous utilization of processing resources by maintaining a pipeline where memory blocks are continuously processed by logical CPUs while I/O operations are continuously executed by the storage device. The coordinator bridges these continuous operations, preventing idle time and resource waste through efficient scheduling and load balancing.

Inventive Principle:
Principle #20Continuity of useful action

3Device complexity

If a single logical CPU handles traditional dump, then system simplicity is maintained, but computing power of multi-core processor is wasted

Engineering Contradiction:
Improvesystem simplicityVSAvoidcomputing power utilization
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The coordinator component serves multiple functions: it manages I/O scheduling, coordinates between multiple logical CPUs and the storage device, handles error recovery, and optimizes resource allocation. This multi-functional design allows the system to leverage multiple cores effectively while maintaining a relatively simple overall architecture, as the coordinator consolidates multiple responsibilities in a single management point.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS8627148B2Method and apparatus for memory dump processing and a memory dump system
Publication Date: 2014.01.07 HUAWEI TECH CO LTD
  • US8627148B2 patent drawing
  • US8627148B2 patent drawing
  • US8627148B2 patent drawing

AI summary

The present application provides a method, an apparatus and a system for memory dump processing. The method comprises: invoking a first set of processing units to process a first stage of memory dump processing for each of memory blocks; invoking each set of processing units other than the first set of processing units to process a subsequent processing stage after completing the first stage respectively, to write the memory blocks into a storage device. The technical solutions provided in the present application enable processing each stage for each of the memory blocks in a pipeline manner, avoid instantaneous peak flow of disk I/O transmission and improve memory dump performance.