Test Circuit for Memory Duty Cycle Measurement
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Solution Overview
Problem
Current technologies face challenges in accurately testing the duty cycle of high-speed clock signals, ensuring testing accuracy, and generating equidistant and parallel clock signals, which are crucial for improving memory performance.
Innovation Solution
A test circuit comprising a first integration circuit, a second integration circuit, and a comparison circuit that receives inverted test signals, integrates them, and compares their voltage values to determine the duty cycle, with the first integrated signal being proportional to the duty cycle and voltage amplitude, and the second integrated signal being proportional to the duty cycle and voltage amplitude, allowing for accurate determination of the duty cycle greater than or less than 50%.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If high-speed clock signals are used for data processing, then the speed of data processing is improved, but the accuracy of duty cycle testing deteriorates
Solution Approach 1:
The patent introduces an integration circuit as an intermediary between the high-speed clock signal and the measurement system. The integration circuit converts the high-frequency clock signal into a low-frequency triangular wave signal, which can be accurately measured. This intermediary transformation allows the system to maintain high-speed data processing while achieving accurate duty cycle measurement of the converted signal.
2Measurement precision
If complex testing methods are used to ensure duty cycle accuracy, then measurement precision is improved, but device complexity increases
Solution Approach 1:
The patent changes the frequency parameter of the clock signal through integration transformation. By converting the high-frequency clock signal into a low-frequency triangular wave signal, the system can use simple comparison circuits to achieve accurate duty cycle measurement without requiring complex high-frequency measurement equipment.
3Loss of time
If duty cycle testing is performed directly on high-speed clock signals, then measurement time is reduced, but measurement precision deteriorates
Solution Approach 1:
The patent performs preliminary transformation of the clock signal before measurement. The integration circuit pre-processes the high-speed clock signal into a measurable triangular wave form, allowing subsequent accurate measurement without requiring complex real-time high-frequency analysis, thus maintaining both speed and accuracy.
Data Source
AI summary
A test circuit includes first integration circuit configured to receive first test signal and integrate first test signal to output first integrated signal; second integration circuit configured to receive second test signal and integrate second test signal to output second integrated signal, where first test signal and second test signal are signals inverted with respect to each other, value of first integrated signal is product of duty cycle of first test signal and a voltage amplitude of power supply, and value of second integrated signal is product of duty cycle of second test signal and voltage amplitude of power supply; and comparison circuit connected to first and second integration circuits. The comparison circuit is configured to output high-level signal in response to first integrated signal being greater than second integrated signal, and output low-level signal in response to second integrated signal being greater than first integrated signal.