Semiconductor Memory With Dynamic ECC And Masking Modes
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Modern computing systems face inefficiencies and costs due to the need to switch memory types for different data processing tasks, as existing memory technologies are not adaptable to varying data integrity and write speed requirements.
Innovation Solution
A semiconductor memory device with a memory block structure that includes data bits and additional bits, equipped with logic to perform masked writes and error-correcting code operations, allowing for flexible data storage and retrieval based on command inputs, supporting both high-integrity and high-speed data processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If data masking is used to decrease write delay, then write speed is improved, but data integrity deteriorates
Solution Approach 1:
The memory device dynamically switches between data masking mode and ECC mode based on the command received. When a first command is received, data masking is applied to improve write speed. When a second command is received, ECC operations are applied to ensure data integrity. This dynamic adaptability allows the system to optimize performance for different operational requirements without being constrained to a single mode.
2Reliability
If error-correcting codes are used to ensure data integrity, then reliability is improved, but write delay increases
Solution Approach 1:
The memory device dynamically switches between data masking mode and ECC mode based on the command received. When a first command is received, data masking is applied to improve write speed. When a second command is received, ECC operations are applied to ensure data integrity. This dynamic adaptability allows the system to optimize performance for different operational requirements without being constrained to a single mode.
3Adaptability or versatility
If memory type is changed to suit different data processing requirements, then adaptability is improved, but system complexity and cost increase
Solution Approach 1:
The memory device is designed to perform multiple functions within a single unified architecture. It can operate in data masking mode for high-speed graphics processing and in ECC mode for high-reliability transaction processing, eliminating the need for separate specialized memory devices. This multi-functionality reduces system complexity and cost while maintaining adaptability to different data processing requirements.
Data Source
AI summary
A memory and a method of storing data in a memory are provided. The memory comprises a memory block comprising data bits and additional bits. The memory includes logic which, when receiving a first command, writes data into the data bits of the memory block, wherein the data is masked according to a first input. The logic, in response to a second command, writes data into the data bits of the memory block and writes a second input into the additional bits of the memory block.


