Non-Volatile Memory Early Source-Line Ramp for Faster Verify

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Solution Overview

Problem

Non-volatile memory systems face performance bottlenecks due to pauses in raising word line voltages during program verify, leading to increased operation times.

Innovation Solution

The proposed solution involves eliminating the pause in raising word line voltages by lowering the source line voltage earlier to support sensing before applying the verify reference voltage, thereby reducing program verify time without causing disturb issues.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a pause is introduced in raising word line voltages to allow channels to discharge during program verify, then data integrity is maintained, but operation time increases

Engineering Contradiction:

Improvedata integrityVSAvoidprogram verify time

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

The source line voltage is lowered to the sensing support voltage before the verify reference voltage is applied to the selected word line. This preliminary action allows the sensing support voltage to be established in advance, enabling the channels to be ready for sensing without requiring a pause during the verify operation itself.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent eliminates the pause in raising word line voltages by continuously transitioning from programming to verify mode. The source line voltage is smoothly transitioned from the programming support voltage to the sensing support voltage without interruption, allowing the program verify operation to proceed continuously without stopping the word line voltage ramp.

Inventive Principle:

Principle #20Continuity of useful action

2Productivity

If the pause in raising word line voltages is eliminated to reduce operation time, then productivity improves, but disturb issues may occur

Engineering Contradiction:

Improveprogram verify speedVSAvoiddisturb

Core Design Contradiction:

ProductivityVSObject-affected harmful factors

Solution Approach 1:

The source line voltage transition serves as an intermediary mechanism that mediates between the programming and verify operations. By transitioning the source line voltage from programming support voltage to sensing support voltage during the verify operation, it allows the word line voltages to be raised continuously without causing disturb to unselected memory cells.

Inventive Principle:

Principle #24Intermediary (Mediator)

Data Source

PatentUS12469568B2Non-volatile memory with early ramp for improved performance

Publication Date: 2025.11.11 SANDISK TECHNOLOGIES LLC

AI summary

To increase performance, a non-volatile storage apparatus reduces the amount of time needed for program verify by eliminating a pause in the raising of word line voltages that has been used to allow the channels of memory cells to discharge. To compensate for the removal of the time previously used to allow the channels of memory cells to discharge without experiencing a disturb, a source line that is in communication with the channels is lowered from a source voltage applied to support programming to a source voltage applied to support sensing (for program verify) earlier than in previous designs such that the source line reaches the source voltage applied to support sensing (for program verify) prior to applying the verify reference voltage to the selected word line for program verify.