Multi-Channel ECC Rotation to Preserve Memory Bandwidth
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Solution Overview
Problem
Standard DRAM memory with ECC logic is not suitable for systems requiring high storage capacity and bandwidth due to cost, design limitations, and availability issues, leading to reduced bandwidth when error correction is implemented through dual write/read accesses.
Innovation Solution
A method for writing and reading data that simultaneously writes or reads error correction codes to a different channel in a multi-channel memory module, allowing for parallel operations across multiple channels to maintain bandwidth and ensure data integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If error correction code is implemented using dual write/read accesses, then data integrity is improved, but bandwidth is reduced by half
Solution Approach 1:
The patent moves the error correction code from the same memory channel dimension to a different channel dimension. By writing data to one channel and its ECC to another channel simultaneously, the system utilizes the multi-channel dimension to achieve parallel operations, thereby maintaining bandwidth while ensuring data integrity.
Solution Approach 2:
The patent combines data and error correction code operations into a single simultaneous write/read cycle across multiple channels. Instead of separate sequential accesses, the data write to channel n and ECC write to channel n+1 occur in parallel, merging two operations into one time step and preserving full bandwidth utilization.
2Reliability
If standard DRAM-ECC memory is used, then data integrity is improved, but cost and design limitations increase
Solution Approach 1:
The patent segments the error correction functionality from the data storage function. Instead of using integrated DRAM-ECC memory chips, the system separates data channels from ECC channels, allowing standard DRAM modules to be used while implementing ECC through a distributed multi-channel approach, thereby reducing cost and design complexity.
Solution Approach 2:
The patent makes standard DRAM modules universal by enabling them to serve both as data storage and error correction code storage through the multi-channel scheme. The same type of DRAM module can be used for both purposes, eliminating the need for specialized ECC memory chips and reducing design limitations.
Data Source
AI summary
A write or read method for use in a computer having multiple channels of memory includes writing or reading data to or from one channel in the memory, and simultaneously in parallel writing or reading an error correction code corresponding to the data to or from a different channel in the memory.