Memory ECC Correction for Vulnerable Multi-Level Cell Patterns

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Solution Overview

Problem

Multi-level memory cells face errors due to threshold voltage distribution changes over time and coupling effects, which existing error correction codes struggle to address effectively.

Innovation Solution

A semiconductor memory device with an ECC engine that performs first and second ECC encoding/decoding based on detected cell patterns, with the ECC engine mapping data to a table before additional encoding to correct errors in vulnerable cell patterns, enhancing error correction in both the main and spare areas of the memory cell array.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If multi-level memory cells are used to increase integration density, then storage capacity is improved, but error rate increases due to threshold voltage distribution changes and coupling effects

Engineering Contradiction:
Improvestorage capacityVSAvoiderror rate
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The ECC correction process is segmented into multiple stages: first ECC correction for general errors, and second ECC correction specifically for cell pattern-related errors. This segmentation allows targeted correction of different error types, improving overall reliability while maintaining high storage capacity

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system performs preliminary detection of cell patterns before ECC correction. By identifying vulnerable cell patterns in advance, the system can apply appropriate correction strategies, preventing error propagation and improving data reliability in multi-level memory cells

Inventive Principle:
Principle #10Preliminary action

2Reliability

If additional second ECC encoding is performed on vulnerable cell patterns, then error correction capability is improved, but processing complexity increases

Engineering Contradiction:
Improveerror correction capabilityVSAvoidprocessing complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

Instead of applying uniform ECC correction to all data, the system applies second ECC correction only to data corresponding to detected vulnerable cell patterns. This localized approach enhances error correction capability where needed while avoiding unnecessary processing overhead for non-vulnerable cells

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

A mapping table serves as an intermediary between the detected cell patterns and the second ECC correction process. The mapping table stores correspondence relationships between cell patterns and their corrected forms, simplifying the correction logic and reducing processing complexity by pre-computing correction mappings

Inventive Principle:
Principle #24Intermediary (Mediator)

3Measurement precision

If cell pattern detection and mapping table operations are implemented, then error detection precision is improved, but processing time increases

Engineering Contradiction:
Improveerror detection precisionVSAvoidprocessing time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The mapping table is pre-computed and stored during system initialization or manufacturing, containing all necessary correction mappings for various cell patterns. During operation, the system only needs to perform simple table lookups based on detected patterns, significantly reducing processing time while maintaining high detection precision

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

Instead of performing complex real-time calculations for each cell pattern, the system uses pre-computed mapping tables that store correction mappings. This copying approach replaces intensive computational operations with simple data retrieval, reducing processing time while preserving error detection precision

Inventive Principle:
Principle #26Copying

Data Source

PatentUS8607120B2Semiconductor memory device for performing additional ECC correction according to cell pattern and electronic system including the same
Publication Date: 2013.12.10 SAMSUNG ELECTRONICS CO LTD
  • US8607120B2 patent drawing
  • US8607120B2 patent drawing
  • US8607120B2 patent drawing

AI summary

A semiconductor memory device for performing additional error correction code (ECC) correction according to a cell pattern and an electronic system including the same are provided. The semiconductor memory device includes a memory cell array configured to store user data; and an ECC engine configured to perform first ECC encoding on the user data, output a result of the first ECC encoding as ECC information, detect a predetermined cell pattern based on the user data, and additionally perform second ECC encoding on data of a cell corresponding to the predetermined cell pattern detected. Accordingly, data errors that may occur due to a certain cell pattern are prevented.