Memory ECC Cross-Over Parity for Error Floor Correction
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Solution Overview
Problem
Memory devices face challenges in error correction, particularly when decoding data with block-wise concatenated codes, as they often reach an error floor where conventional methods cannot correct errors located at the intersections of column and row codewords, leading to decode failures.
Innovation Solution
Incorporating parity data for cross-over bits at the intersections of column and row codewords, which are used to correct errors through an XOR operation, enhancing the error correction capability of the ECC operation and potentially eliminating the need for an outer code.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional ECC decoding methods are used for block-wise concatenated codes, then the decoding process is simple, but the error correction capability reaches an error floor and cannot correct errors at intersections of column and row codewords
Solution Approach 1:
The patent segments the error correction process into two distinct stages: first applying inner code decoding to correct errors in individual codewords, then applying outer code decoding to correct remaining errors at intersections. This segmentation allows each decoder to specialize in specific error patterns, overcoming the error floor limitation of conventional single-stage decoding while maintaining manageable complexity through modular architecture.
Solution Approach 2:
The patent applies preliminary error correction using inner code decoding before the main outer code decoding process. By pre-correcting errors in individual codewords, the system reduces the error burden on the outer code decoder, enabling it to focus on the more challenging intersection errors and achieve better overall correction capability.
2Reliability
If more outer code decoders are used to improve error correction capability, then more errors can be corrected, but the device complexity and resource requirements increase
Solution Approach 1:
The patent introduces an intermediary inner code decoding stage that acts as a mediator between the data and the outer code decoder. This intermediary performs preliminary error correction, reducing the number of errors that reach the outer code decoder and thereby reducing the complexity requirements of the outer code decoder while maintaining high error correction capability.
Solution Approach 2:
By performing preliminary error correction with inner code decoders before outer code decoding, the system reduces the error burden on outer code decoders. This allows the use of fewer or less complex outer code decoders while achieving the same overall error correction capability, thus reducing device complexity.
Data Source
AI summary
Apparatuses and methods for performing an error correction code (ECC) operation are provided. One example method can include encoding data by including parity data for a number of cross-over bits, wherein the number of cross-over bits are bits located at intersections of column codewords and row codewords.