Memory ECC Architecture for Flexible Encoding Rates and Throughput

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Solution Overview

Problem

Existing memory systems face challenges in efficiently encoding data with different encoding rates without lowering throughput, particularly when applying multi-dimensional error correction codes, due to the need for different encoding part configurations and potential reductions in encoding rate versatility.

Innovation Solution

A memory system configuration that includes a distributor to divide user data into chunks and distribute them across multiple encoders for different dimensions, allowing for flexible allocation of encoders to maintain throughput while supporting various encoding rates and code structures, including product codes with different numbers of component codes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If different encoding part configurations are used for different encoding rates, then encoding rate versatility is improved, but device complexity increases

Engineering Contradiction:
Improveencoding rate versatilityVSAvoidencoding part configuration complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The encoding part is designed with a universal structure that can handle multiple encoding rates (e.g., 50%, 66%, 75%) without requiring separate configurations. The distributor and encoders work together in a unified architecture that adapts to different encoding rates through flexible data distribution patterns rather than structural changes.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

User data is divided into multiple chunks by the distributor, which are then selectively encoded by different encoders based on the target encoding rate. This segmentation approach allows the system to achieve different encoding rates by controlling which chunks are encoded and how they are combined, rather than changing the encoding part configuration.

Inventive Principle:
Principle #1Segmentation

2Adaptability or versatility

If data is divided into chunks and distributed across multiple encoders, then encoding flexibility is improved, but device complexity increases

Engineering Contradiction:
Improveencoding flexibilityVSAvoiddistributor and encoder configuration
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The distributor dynamically routes data chunks to different encoders based on the required encoding rate and code structure. This dynamic routing capability provides encoding flexibility without requiring multiple fixed configurations, as the same hardware structure adapts its behavior according to operational requirements.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The distributor acts as an intermediary between the data source and multiple encoders, managing the flow and distribution of data chunks. This intermediary role simplifies the overall system architecture by centralizing the distribution logic, rather than requiring direct complex interconnections between all components.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If multi-dimensional error correction codes are applied, then correction performance is improved, but encoding rate versatility decreases

Engineering Contradiction:
Improvecorrection performanceVSAvoidencoding rate versatility
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The system applies multi-dimensional error correction codes by organizing data and parity bits in multiple dimensions (e.g., rows and columns), where each dimension provides independent error correction capability. This multi-dimensional structure maintains high correction performance while the distributor enables flexible encoding rates by selectively processing chunks across different dimensions.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS11003528B2Memory system including an error correction function
Publication Date: 2021.05.11 KIOXIA CORP
  • US11003528B2 patent drawing
  • US11003528B2 patent drawing
  • US11003528B2 patent drawing

AI summary

According to one embodiment, a memory system includes a nonvolatile memory, an encoding part configured to generate a plurality of component codes including a first component code and a second component code different from the first component code, by using, as an information symbol, at least one symbol of a plurality of symbols included in user data to be written into the nonvolatile memory, and a memory interface configured to write the plurality of component codes into the nonvolatile memory. The encoding part includes a plurality of encoders each configured to generate a parity corresponding to each of the plurality of component codes, and a first distributor configured to divide a first symbol string of the user data into a plurality of chunks, each of which has a first symbol length smaller than that of the first symbol string, and to input each of the plurality of chunks generated by the division, into any one of at least different two of the plurality of encoders. The memory interface is configured to write the first symbol string and parities corresponding to the first symbol string into the nonvolatile memory.