Memory Device ECC Verification via Intentional Error Injection
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Solution Overview
Problem
There is a need for improved techniques to verify the proper operation of error-correcting codes (ECC) within memory devices, particularly in applications with high reliability constraints, such as automotive systems, to ensure data integrity and system reliability.
Innovation Solution
The implementation of diagnostic techniques that introduce intentional errors into the data stored in memory devices, allowing the ECC procedures to detect and correct these errors, thereby verifying the ECC's functionality and ensuring the reliability of the system.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If ECC functionality is implemented in memory devices, then data integrity is improved, but the complexity of verifying ECC operation increases
Solution Approach 1:
The patent applies preliminary action by pre-storing test data patterns in the memory device before ECC verification. The test data is written to memory locations in advance, and known-good data values are stored for comparison. This preparation enables the verification process to simply compare retrieved data against the pre-stored expected values, simplifying the verification complexity while maintaining reliability.
Solution Approach 2:
The memory device performs self-verification of ECC functionality by using its own internal resources. The device writes test data to itself, retrieves the data, and compares it against stored expected values without requiring external verification equipment. This self-service approach reduces external complexity while ensuring data integrity through internal ECC operation verification.
2Reliability
If diagnostic techniques introduce intentional errors into stored data, then ECC functionality verification is improved, but data integrity during diagnosis deteriorates
Solution Approach 1:
The patent extracts the verification function from normal data storage by using dedicated test data patterns and separate verification storage locations. Test data is written to specific memory locations designated for verification purposes, and the verification process operates on these isolated test patterns rather than on production data. This extraction allows intentional error introduction during diagnosis without affecting the integrity of actual stored information.
Solution Approach 2:
The patent changes the state parameter of test data from 'protected' to 'intentionally corrupted' during the diagnostic process. Known-good data values are stored for comparison, and test data is deliberately altered with intentional errors to verify ECC correction capability. After verification, the test data parameter is restored. This controlled parameter change enables ECC functionality verification while maintaining the ability to restore data integrity.
3Reliability
If ECC verification is performed frequently, then system reliability is improved, but processing time increases
Solution Approach 1:
The patent implements periodic action by performing ECC verification at scheduled intervals rather than continuously. Verification operations are triggered by specific events such as memory initialization, after a predetermined number of write operations, or at scheduled time intervals. This periodic verification approach maintains system reliability by regularly checking ECC functionality while minimizing processing time loss by avoiding continuous verification overhead.
Data Source
AI summary
Methods, systems, and devices for error correction management are described. A system may include a memory device that supports internal detection and correction of corrupted data, and whether such detection and correction functionality is operating properly may be evaluated. A known error may be included (e.g., intentionally introduced) into either data stored at the memory device or an associated error correction codeword, among other options, and data or other indications subsequently generated by the memory device may be evaluated for correctness in view of the error. Thus, either the memory device or a host device coupled with the memory device, among other devices, may determine whether error detection and correction functionality internal to the memory device is operating properly.