Memory ECC With Known Data for High Bit Error Recovery
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Solution Overview
Problem
Conventional memory devices face reliability issues as the bit error rate increases over time, causing error correction codes to fail in decoding data, leading to premature degradation of memory cells and reduced storage capabilities.
Innovation Solution
Combining user data with known data patterns to enhance error correction capabilities, allowing the memory device to correct errors beyond its initial error correction code rate, thereby extending the useful life of memory cells and reducing wear on memory cells by avoiding state changes during programming.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If error correction code of predetermined code rate is used, then data retrieval reliability is improved, but error correction capability is limited when bit error rate exceeds threshold
Solution Approach 1:
The system dynamically adjusts the error correction code rate based on the bit error rate. When the bit error rate exceeds the threshold of the predetermined code rate, the system switches to a different code rate to maintain error correction capability. This dynamic adaptation allows the memory device to handle varying error conditions effectively, resolving the contradiction between maintaining fixed code rate simplicity and achieving adaptable error correction across different reliability conditions.
Solution Approach 2:
The system changes the code rate parameter of the error correction code based on the observed bit error rate. By monitoring the bit error rate and adjusting the code rate accordingly, the system can maintain effective error correction even when errors exceed the initial predetermined threshold. This parameter change enables the system to adapt to deteriorating memory conditions without losing error correction capability.
2Productivity
If memory cells undergo repeated programming to store data, then storage capacity is utilized, but wear on memory cells increases leading to premature degradation
Solution Approach 1:
The system performs preliminary error correction by combining user data with known data patterns before storing in memory cells. This preliminary action reduces the bit error rate proactively, allowing the use of a lower predetermined code rate and reducing the need for repeated programming operations. By addressing errors before they accumulate, the system extends memory cell lifespan while maintaining storage utilization.
Solution Approach 2:
The system uses known data patterns as a beneficial resource to counteract the harmful effect of bit errors. By combining user data with known patterns, the system converts the potential harm of high bit error rates into an opportunity to improve error correction efficiency. This approach reduces wear on memory cells by minimizing the need for re-programming while maintaining storage productivity.
3Reliability
If bit error rate increases over time, then memory device ages, but error correction code fails to decode data leading to reduced storage capabilities
Solution Approach 1:
The system implements feedback by monitoring the bit error rate and using this information to adjust the error correction strategy. When the bit error rate increases over time, the system responds by combining user data with known data patterns and adjusting the code rate accordingly. This feedback mechanism ensures continuous successful decoding even as the memory device ages, extending the useful life of the storage device.
Solution Approach 2:
The system performs preliminary combination of user data with known data patterns before the error correction process. This preliminary action prepares the data in advance to withstand higher bit error rates, ensuring that decoding can succeed even as the memory device ages. By taking this preliminary action, the system maintains data decoding success and extends the operational lifespan of the memory device.
Data Source
AI summary
A memory device to use added known data as part of data written to memory cells with redundant data generated according to an error correction code (ECC). The code rate of the ECC may limit its capability to recover from excessive errors in the stored data. To reduce the errors, the added data retrieved from the memory cells can be corrected without using the ECC. Subsequently, remaining errors can be corrected via the ECC. Optionally, the added data can be configured to be the same as the data represented by an erased state of a subset of the memory cells such that when the subset is used to store the added data, the subset remains in the erased state to reduce wearing. Different subsets can be used to store added data for different write operations to distribute the benefit of reduced wearing.