Memory ECC Decoding with Loop-Buffer Erasure Recovery

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Solution Overview

Problem

Current memory systems face challenges in effectively correcting errors in data transmission, as existing error correction codes (ECC) methods may not adequately address errors that persist after normal read operations or retry operations, leading to incomplete data recovery.

Innovation Solution

The proposed memory system incorporates a loop-buffer and an ECC decoder that operates in two modes: a first mode for direct ECC decoding using a general Reed-Solomon algorithm and a second mode using an erasure-loop method, where read data is stored in a loop-buffer and symbols are sequentially erased to correct errors, enhancing error correction capabilities.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If standard ECC decoding is used for read data, then the decoding process is simple and fast, but errors that persist after normal read operations or retry operations cannot be corrected

Engineering Contradiction:
Improveerror correction capabilityVSAvoiddecoding process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The ECC decoder dynamically switches between two operation modes based on the error state of read data. In the first operation mode, standard ECC decoding is performed for normal operation. When errors persist after retry operations, the system transitions to the second operation mode where read data is stored in a loop-buffer and subjected to iterative ECC decoding with sequential symbol erasure. This dynamic adaptation allows the system to handle persistent errors while maintaining simplicity for normal operations.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The ECC decoding process is segmented into two distinct operation modes. The first mode handles standard ECC decoding directly from memory media. The second mode segments the decoding process into iterative steps where data is stored in a loop-buffer, and symbols are sequentially erased and re-decoded. This segmentation allows targeted application of complex decoding only when necessary.

Inventive Principle:
Principle #1Segmentation

2Reliability

If iterative ECC decoding with loop-buffer is implemented, then persistent errors can be corrected, but the processing time and computational resources increase

Engineering Contradiction:
Improvedata integrityVSAvoidprocessing time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The system dynamically selects the appropriate operation mode based on error detection results. Standard ECC decoding is performed first for rapid processing. Only when errors persist after retry operations does the system transition to the time-consuming iterative decoding mode with loop-buffer. This dynamic selection minimizes processing time for the majority of normal operations while providing thorough error correction only when absolutely necessary.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system performs preliminary error detection and retry operations before committing to the iterative decoding process. Read data undergoes initial ECC decoding and retry attempts using standard methods. Only when these preliminary actions fail to correct errors does the system proceed to store data in the loop-buffer and execute the more time-consuming iterative decoding with symbol erasure. This preliminary filtering reduces the frequency of expensive iterative decoding operations.

Inventive Principle:
Principle #10Preliminary action

3Productivity

If read data is directly decoded without storing in loop-buffer, then processing is efficient, but iterative decoding with symbol erasure cannot be performed

Engineering Contradiction:
Improvedecoding efficiencyVSAvoiderror correction completeness
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The decoding architecture is segmented into two pathways: a direct decoding pathway for efficient processing of normal data, and a loop-buffer pathway for iterative decoding of persistent errors. The first operation mode routes data through the direct pathway. The second operation mode routes data through the loop-buffer pathway, enabling iterative decoding with sequential symbol erasure. This segmentation allows the system to maintain high productivity for normal operations while ensuring complete error correction when needed.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The loop-buffer serves as an intermediary storage element that enables iterative decoding operations. When the second operation mode is activated, the loop-buffer mediates between the memory media and the ECC decoder, allowing data to be stored, reprocessed with different symbol erasures, and re-decoded. This intermediary structure enables the iterative decoding process without interfering with the efficiency of direct decoding operations.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS11048586B2Memory systems and methods of correcting errors in the memory systems
Publication Date: 2021.06.29 SK HYNIX INC
  • US11048586B2 patent drawing
  • US11048586B2 patent drawing
  • US11048586B2 patent drawing

AI summary

A memory system includes a memory medium, a loop-buffer configured to store read data outputted from the memory medium in a first operation mode, a fake-command generator configured to generate a fake-command in a second operation mode, and an error correction code (ECC) decoder configured to perform an ECC decoding operation of the read data stored in the loop-buffer in response to the fake-command.