Memory ECC Check Matrix Layout for Defect-Tolerant Data Correction
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Solution Overview
Problem
As memory devices increase in capacity, it becomes difficult to fabricate them without defective memory cells, leading to errors during read and write operations, which existing error correction methods struggle to effectively address.
Innovation Solution
A memory system incorporating an error correction code generation circuit and error correction circuit that utilize a check matrix to generate and correct errors, with specific configurations for group and bit indicators to minimize errors, including the use of an M×[(K*N)+M] check matrix and hamming distance conditions to distinguish data groups and correct errors efficiently.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory device capacity is increased, then storage capability is improved, but the likelihood of defective memory cells increases
Solution Approach 1:
The data is divided into multiple data groups, each assigned a unique group indicator. This segmentation allows the error correction system to identify and handle errors at the group level, improving reliability without requiring a proportional increase in overall redundancy across the entire memory capacity.
Solution Approach 2:
Group indicators serve as intermediaries between the data groups and the error correction code. These indicators enable the error correction circuit to identify which data group contains an error, allowing for targeted correction without needing to protect every single bit individually, thus maintaining reliability while scaling capacity.
2Reliability
If conventional error correction methods are used, then some errors can be corrected, but mis-correction of data may still occur
Solution Approach 1:
By segmenting data into groups with unique indicators, the system can identify the specific group containing an error. This prevents mis-correction of data in other groups, as the error correction circuit only applies corrections to the identified erroneous group rather than potentially correcting wrong data elsewhere.
Solution Approach 2:
The patent changes the parameter of the error correction code by incorporating group indicators with specific Hamming distance properties. This modification to the traditional ECC approach enables the system to distinguish between different data groups, ensuring that error correction is applied only to the correct group and preventing data mis-correction.
3Measurement precision
If standard check matrices are used for error correction, then error detection is possible, but efficient correction with minimal errors is difficult
Solution Approach 1:
The patent modifies the check matrix parameters by incorporating group indicators with specific Hamming distance properties (Hamming distance of 1 or M/2 between neighboring group indicators). This parameter change enables the error correction circuit to not only detect errors accurately but also efficiently locate and correct them by identifying which data group is erroneous, thereby improving correction reliability.
Solution Approach 2:
The group indicators are preliminarily assigned to data groups before error correction is performed. This preliminary structuring of data with identifiable group markers enables the error correction process to quickly locate errors without having to examine every bit, improving both detection accuracy and correction efficiency.
Data Source
AI summary
A memory includes: a memory core including sequentially disposed N data cell regions and an ECC cell region respectively suitable for storing N data pieces of K bits and a corresponding ECC of M bits; and an error correction circuitry suitable for generating the ECC based on the data pieces and error-correcting the data pieces based on the ECC, through a check matrix configured by a message part of a [M×(K*N)] bit-dimension and an ECC part of a [M×M] bit-dimension, wherein the message part includes N characteristic indicator groups of a [M/2×K] bit-dimension, respectively corresponding to the data pieces, and each including K indicators of a [M/2×1] bit-dimension and having the same value, and wherein a hamming distance between the indicators respectively corresponding to the data pieces stored in neighboring ones among the data cell regions is 1 or M/2.