Memory-Device ECC Partitioning for Lower Power and Heat
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Memory systems, such as solid-state drives, face high power consumption and operation temperature issues due to error correction coding performed by system controllers, which leads to increased data transfer through electrical circuit boards.
Innovation Solution
Implementing error correction code (ECC) circuits within memory devices, such as flash memory, to reduce data transfer through electrical circuit boards and dispersing heat sources, thereby reducing power consumption and improving heat dissipation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If error correction coding is performed by the system controller, then data can be corrected for errors, but power consumption increases and heat dissipation becomes difficult
Solution Approach 1:
The patent divides the error correction coding function into two parts: a first ECC circuit in the memory device handles basic error correction for data stored in memory, while a second ECC circuit in the system controller handles additional error correction for data transferred through the electrical connection board. This segmentation allows the memory device to perform error correction locally, reducing the amount of data that needs to be transferred and processed by the system controller, thereby reducing power consumption while maintaining comprehensive error correction capability.
Solution Approach 2:
The patent introduces an electrical connection board as an intermediary component between the memory device and the system controller. This board includes a first ECC circuit that performs error correction coding on data before it is transmitted to the system controller. By placing this intermediary error correction function on the connection board, the system reduces the processing burden on the system controller and minimizes the amount of data that needs to be transmitted over high-power consumption interfaces.
2Reliability
If error correction coding is performed by the system controller, then data can be corrected for errors, but operation temperature increases
Solution Approach 1:
The patent segments the error correction processing across multiple locations: the first ECC circuit in the memory device handles error correction locally, reducing the computational load on the system controller. The second ECC circuit in the system controller handles remaining error correction needs. This segmentation distributes heat generation across multiple components rather than concentrating it in the system controller, improving overall heat dissipation.
Solution Approach 2:
The electrical connection board with its first ECC circuit acts as an intermediary that performs error correction before data reaches the system controller. This reduces the amount of data processing required by the system controller, thereby reducing the heat generated by the controller's ECC operations and improving the overall thermal management of the system.
3Reliability
If data is transferred through electrical circuit boards for error correction, then error correction can be performed, but data transfer volume increases power consumption
Solution Approach 1:
The patent applies preliminary error correction by placing the first ECC circuit in the memory device or on the electrical connection board. This preliminary error correction encoding is performed before data is transmitted to the system controller, reducing the amount of data that needs to be transferred and processed. By performing this preliminary action, the system minimizes the energy loss associated with data transfer while ensuring that error correction is already partially completed.
Solution Approach 2:
The electrical connection board serves as an intermediary that performs error correction coding on data before it is transmitted to the system controller. This intermediary processing reduces the volume of data that needs to be transferred over the electrical connection board, thereby reducing the power consumption associated with data transfer while maintaining error correction functionality.
Data Source
AI summary
Methods, devices, systems, and apparatus including computer-readable mediums for managing error correction coding in memory systems are provided. In one aspect, a memory system includes a system controller configured to communicate with a host device, and a memory device coupled to the system controller. The memory device includes at least one memory and a memory controller coupled to the at least one memory. The memory controller includes an error correction code (ECC) circuit configured to perform error correction coding for data received from at least one of the system controller or the at least one memory.