Multi-Stage Memory ECC Layout for Fewer Read Accesses

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Solution Overview

Problem

Existing memory systems face inefficiencies in error detection and correction, requiring multiple read accesses to ensure data integrity, which increases operational overhead and can be costly in terms of performance and resource utilization.

Innovation Solution

A dual-stage error detection and correction method where a portion of error detection and correction symbols are stored side-band with the data and an additional portion is stored in-band, allowing for a single read access to determine errors within a threshold, reducing the overall number of read operations needed.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multiple read accesses are performed to ensure data integrity, then error detection and correction capability is improved, but operational overhead and resource utilization increase

Engineering Contradiction:
Improveerror detection and correction capabilityVSAvoidoperational overhead
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The check symbols are segmented into two distinct groups: a first group stored in the same memory location as the data, and a second group stored in a different memory location. This segmentation enables the memory device to perform error detection using only the first group of check symbols in a single read access, reserving the second group for cases where errors are detected and correction is needed, thus reducing average operational overhead while maintaining reliability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The memory device performs partial error detection action by using only the first group of check symbols for initial error detection in every read operation. Full error correction action is performed selectively only when the first group indicates errors are present, avoiding the excessive action of always retrieving and processing the second group of check symbols, thereby optimizing resource utilization.

Inventive Principle:
Principle #16Partial or excessive action

2Reliability

If multiple read accesses are performed to ensure data integrity, then error detection and correction capability is improved, but performance deteriorates

Engineering Contradiction:
Improvedata integrityVSAvoidperformance
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

By segmenting check symbols into two groups stored at different locations, the system enables fast error detection using the first group available in the primary read path, while the second group remains accessible but is only retrieved when needed for correction, thus maintaining high performance for error-free reads while preserving data integrity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The first group of check symbols is preliminarily positioned with the data in the same memory location, enabling immediate error detection during the primary read operation without requiring additional access cycles. This preliminary arrangement ensures that most reads complete quickly without needing to access the second group of check symbols.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If full set of check symbols is always retrieved, then error correction capability is improved, but resource utilization increases

Engineering Contradiction:
Improveerror correction capabilityVSAvoidresource utilization
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The check symbols are divided into a first group stored with the data and a second group stored separately. The memory device selectively retrieves only the first group for routine error detection, and only retrieves the second group when errors are detected, thus reducing the quantity of check symbols transferred and processed in the average case while maintaining full error correction capability when needed.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The second group of check symbols is extracted from the primary data storage location and stored in a separate memory location. This extraction allows the system to operate with minimal check symbol retrieval for most reads, while the extracted second group remains available for selective retrieval when error correction is required, optimizing resource utilization.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS20250370854A1Selectable multi-stage error detection and correction
Publication Date: 2025.12.04 RAMBUS INC
  • US20250370854A1 patent drawing
  • US20250370854A1 patent drawing
  • US20250370854A1 patent drawing

AI summary

When writing a block (e.g., cache line) of data to a memory, error detection and correction (EDC) information (check) symbols are calculated. The block of data, a first portion of the check symbols, and metadata are all written concurrently at a first address. The remaining portion of the check symbols are written at a second, different from the first, address. When reading the block of data, a first read command accesses the block of data, the first portion of the check symbols, and the metadata from the first address. Only the first portion of the check symbols is used to determine a first number of errors (if any) in the accessed data. If the first number of errors meets a threshold number of errors, a second read command is issued to access the second portion of the check symbols.