Semiconductor Memory ECC Control for Data Retention and Power
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Solution Overview
Problem
Existing nonvolatile semiconductor memory devices with laminated gate structures face issues with data retention over time, leading to errors, and current high-performance error correction mechanisms are wasteful in power consumption and circuit size, as they are applied uniformly regardless of storage time, even for short-term data.
Innovation Solution
A semiconductor memory device with a dual error correction mechanism, using first correcting codes with low power consumption and small circuit scale for short-term data and a second correcting code with higher capability for long-term data, allowing adaptive error correction based on storage time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a high-performance error correction mechanism is applied uniformly to all data regardless of storage time, then error correction capability is improved, but power consumption and circuit size increase unnecessarily
Solution Approach 1:
The error correction mechanism dynamically adapts its performance level based on the storage time of data. The control circuit determines whether to apply high-performance or low-performance error correction based on metadata indicating how long the data has been stored, allowing the system to optimize power consumption while maintaining adequate error correction capability for each data item's specific needs.
Solution Approach 2:
Different error correction capabilities are applied to different data items based on their individual storage time characteristics. Instead of uniformly applying high-performance error correction to all data, the system applies appropriate error correction levels locally to each data item, matching the correction capability to the actual error risk associated with that specific data's storage duration.
2Reliability
If a high-performance error correction mechanism is applied uniformly to all data regardless of storage time, then error correction capability is improved, but circuit size increases
Solution Approach 1:
The error correction mechanism dynamically adapts its performance level based on the storage time of data. The control circuit determines whether to apply high-performance or low-performance error correction based on metadata indicating how long the data has been stored, allowing the system to optimize circuit resource usage while maintaining adequate error correction capability for each data item's specific needs.
Solution Approach 2:
Different error correction capabilities are applied to different data items based on their individual storage time characteristics. Instead of uniformly applying high-performance error correction to all data, the system applies appropriate error correction levels locally to each data item, matching the correction capability to the actual error risk associated with that specific data's storage duration.
3Duration of action of stationary object
If electrons are injected to the floating gate electrode through the tunnel insulating film to store information, then nonvolatile storage is achieved, but electric charges leak to the substrate over time causing errors
Solution Approach 1:
The system performs preliminary error correction by applying error correcting codes to data before storage. This preventive measure addresses potential charge leakage errors before they occur, allowing the system to maintain information accuracy even as data retention time extends and charge leakage becomes more likely.
Solution Approach 2:
The error correction mechanism acts as a cushion against future errors caused by charge leakage. By preparing error correction capabilities in advance and applying them based on storage time, the system compensates for the inevitable degradation of charge retention over time, maintaining reliability despite the physical limitations of the tunnel insulating film.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces power consumption and circuit size while maintaining high error correction capability, optimizing resource usage by tailoring error correction to the duration of data storage.
Implementation Method 1
electrons are injected from the substrate to the floating gate electrode through the tunnel insulating film
Implementation Method 2
The electric charges accumulated in the floating gate electrode retain information
Implementation Method 3
The electric charges accumulated in the floating gate electrode leak to the substrate through the tunnel insulating film as the time elapses
Data Source
AI summary
A semiconductor memory device includes a plurality of detecting code generators configured to generate a plurality of detecting codes to detect errors in a plurality of data items, respectively, a plurality of first correcting code generators configured to generate a plurality of first correcting codes to correct errors in a plurality of first data blocks, respectively, each of the first data blocks containing one of the data items and a corresponding detecting code, a second correcting code generators configured to generate a second correcting code to correct errors in a second data block, the second data block containing the first data blocks, and a semiconductor memory configured to nonvolatilely store the second data block, the first correcting codes, and the second correcting code.