Nonvolatile Memory ECC Save Area for Corrected Data Retention
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Solution Overview
Problem
Nonvolatile memory systems face issues with data deterioration and uncorrectable errors due to repeated read operations, which can lead to system failure and require unexpected write-back processes, disrupting host device access and data reliability.
Innovation Solution
A nonvolatile memory system with a control unit that includes an error detection and correction function, a save area for storing corrected data and addresses, and a validity presentation block to manage data validity, allowing for controlled write-back operations and minimizing the impact of write-back processes on system performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If error correction is performed by writing back correct data to memory cells, then data reliability is improved, but host device access is disrupted and system productivity deteriorates
Solution Approach 1:
The patent divides the error correction process into two distinct phases: a correction phase where correct data is written back to memory cells, and a normal access phase where the host device can access data without interruption. The correction phase is performed during idle periods or power-off states, separating it from host access operations to eliminate disruptions.
Solution Approach 2:
The patent performs error correction in advance during idle periods or power-off states before the host device needs to access the data. By completing the write-back of correct data beforehand, the system ensures that when the host device accesses the memory, all corrections are already in place, eliminating any access disruptions.
2Reliability
If repeated read operations are performed on memory cells with erroneous data, then data deterioration is accelerated and uncorrectable errors occur, but system complexity increases to manage correction timing
Solution Approach 1:
The patent enables the memory system to automatically detect errors and perform self-correction during idle periods or power-off states without requiring complex external management. The system uses its own internal resources to identify erroneous data patterns and execute write-back operations autonomously, reducing the need for sophisticated correction management mechanisms.
Solution Approach 2:
The patent implements a feedback mechanism where the system continuously monitors memory cell status, detects erroneous data through error correction codes, and automatically triggers write-back operations when errors are identified. This closed-loop feedback system simplifies management by allowing the system to self-regulate correction timing based on actual error conditions rather than requiring complex external scheduling.
Data Source
AI summary
Disclosed herein is a nonvolatile memory, including: a memory area including a data area configured to retain data and an error correction code area configured to retain an error correction code known as ECC; and a control unit configured to control access to the memory area. The control unit includes an error detection and correction function configured to detect an error in the data read from the data area and to correct the detected error, at least one save area configured such that if data at a designated address and ECC corresponding thereto are read from the memory area and if an error is detected, then the save area retaining the address and correct data corresponding thereto, and a validity presentation block configured to indicate whether or not the address and the correct data retained in the save area are valid.