Memory Cell ECC with Known Data for Wear-Aware Error Recovery
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Solution Overview
Problem
Conventional memory devices face challenges in reliably storing data as the bit error rate increases, exceeding the error correction capability of the Error Correction Code (ECC) over time, leading to premature degradation and reduced storage reliability.
Innovation Solution
Combining user data with known data to generate protected data using an ECC of a predetermined code rate, which enhances error correction capabilities and reduces wear on memory cells by utilizing the erased states of memory cells, thereby extending the useful life of memory devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional ECC with predetermined code rate is used for error correction, then error correction capability is maintained within initial thresholds, but error correction capability becomes insufficient as bit error rate increases over time
Solution Approach 1:
The patent dynamically adjusts the code rate of the error correction code based on the measured bit error rate. When the bit error rate exceeds the initial threshold, the system transitions from using a first code rate to a second code rate with higher redundancy, thereby adapting the error correction capability to the actual error conditions and extending the memory device's useful life.
Solution Approach 2:
The patent changes the parameter of the error correction code (code rate) based on the bit error rate conditions. By switching between different code rates (first code rate and second code rate), the system optimizes the balance between storage capacity and error correction capability, allowing reliable operation even when bit error rates increase over time.
2Reliability
If higher code rate ECC is used to improve error correction capability, then error correction capability increases, but storage capacity decreases
Solution Approach 1:
The system dynamically selects the appropriate code rate based on actual error conditions rather than using a fixed high code rate. This allows the system to maintain higher storage capacity by using the lower redundancy first code rate when error rates are acceptable, and only switching to the higher redundancy second code rate when actually needed, thus optimizing both reliability and storage capacity.
Solution Approach 2:
The patent changes the code rate parameter adaptively based on bit error rate measurements. By adjusting this parameter rather than fixing it at a high value, the system achieves sufficient error correction capability only when necessary, thereby preserving maximum storage capacity during normal operation while providing enhanced protection when errors occur.
3Reliability
If frequent ECC operations are performed to correct errors, then data reliability is maintained, but wear on memory cells increases
Solution Approach 1:
The patent applies preliminary error correction by detecting bit errors during read operations and correcting them before they propagate. By using the second error correction code with higher capability to correct errors proactively, the system prevents error accumulation that would require more intensive and wear-inducing correction operations later, thereby reducing overall wear on memory cells.
Solution Approach 2:
The system prepares for potential errors by maintaining two error correction codes with different capabilities. The second code serves as a cushion or backup with higher correction capability, allowing the system to handle errors gracefully without requiring aggressive or repeated correction cycles that would increase wear on the memory cells.
Data Source
AI summary
A memory device to use added known data as part of data written to memory cells with redundant data generated according to an Error Correction Code (ECC). The code rate of the ECC may limit its capability to recover from excessive errors in the stored data. To reduce the errors, the added data retrieved from the memory cells can be corrected without using the ECC. Subsequently, remaining errors can be corrected via the ECC. Optionally, the added data can be configured to be the same as the data represented by an erased state of a subset of the memory cells such that when the subset is used to store the added data, the subset remains in the erased state to reduce wearing. Different subsets can be used to store added data for different write operations to distribute the benefit of reduced wearing.