Non-volatile Memory Electrode Silicide Projecting Portions
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Solution Overview
Problem
In non-volatile memory devices with miniaturized memory cells, the thinning of word lines leads to increased electrical resistance, which can slow down operation speed, necessitating a reduction in electrical resistance.
Innovation Solution
The non-volatile memory device incorporates a first electrode layer with projecting portions on its side surfaces, which are converted into metal silicides, reducing the electrical resistance by increasing the volume of the silicide and forming projecting portions along the side surfaces, thereby decreasing the width of the electrode layer in memory cell portions and inhibiting electrical resistance increase.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory cells are miniaturized to increase integration density, then storage capacity is improved, but electrical resistance of word lines increases
Solution Approach 1:
The electrode layer is designed with different local properties: projecting portions are formed only in memory cell portions where high conductivity is critical, while non-memory cell portions maintain the original planar structure. This localized modification reduces resistance where needed without affecting overall device density
Solution Approach 2:
The electrode layer transitions from a two-dimensional planar structure to a three-dimensional structure with projecting portions extending upward. This vertical dimension addition increases the effective conduction path area without increasing lateral footprint, thereby reducing resistance while maintaining miniaturization
2Area of stationary object
If electrode layer width is decreased to maintain device footprint, then integration density is improved, but electrical resistance increases
Solution Approach 1:
By extending the electrode layer vertically to form projecting portions, the effective cross-sectional area for current conduction is increased in the vertical dimension. This compensates for the reduced lateral width, maintaining low resistance while preserving small device footprint
Solution Approach 2:
The electrode layer geometry is changed by adding vertical height through projecting portions. This parameter change (from planar to protruding structure) increases the effective conduction area without changing the lateral dimensions, thereby reducing resistance while maintaining compact footprint
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The approach effectively reduces the electrical resistance of the electrode layers, enhancing the operational speed of memory cells by forming metal silicides with a higher metal atom proportion in memory cell portions and suppressing resistance increase through cubic expansion.
Implementation Method 1
The first electrode layer has, on a side surface, a first projecting portion expanding in a third direction perpendicular to the first direction and the second direction, and having a rounding shape in a tip of the first projecting portion
Implementation Method 2
forming projecting portions along the side surfaces, thereby decreasing the width of the electrode layer in memory cell portions and inhibiting electrical resistance increase
Data Source
AI summary
A non-volatile memory device includes a first electrode layer extending in a first direction and a first channel body extending through the first electrode layer in a second direction. The first electrode layer has, on a side surface, a first projecting portion expanding in a third direction perpendicular to the first direction and the second direction, and having a rounding shape in a tip of the first projecting portion.