Memory Device Abnormally Injected Electron Removal

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Solution Overview

Problem

Nonvolatile memory devices face issues with threshold voltage distribution deterioration due to abnormally injected electrons during erase operations, leading to data retention challenges.

Innovation Solution

A memory device with a control logic that performs an abnormally injected electron removal operation after erase operations to minimize threshold voltage distribution deterioration, utilizing a peripheral circuit to execute this operation by increasing the channel potential and applying hot-hole generation voltage to remove trapped electrons.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If an erase operation is performed on memory cells, then data is cleared from the charge storage layer, but abnormally injected electrons are trapped in the charge storage layer due to back-tunneling phenomenon, causing threshold voltage distribution deterioration

Engineering Contradiction:
Improvedata retentionVSAvoidthreshold voltage distribution
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent performs an abnormally injected electron removal operation after the erase operation to remove electrons that were abnormally injected into the charge storage layer during the erase process. This preliminary cleanup action prevents threshold voltage distribution deterioration before it affects data retention, thereby resolving the contradiction between maintaining reliable data storage and preventing manufacturing precision degradation.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent converts the harmful back-tunneling phenomenon that causes abnormal electron injection into a manageable process by implementing a specific electron removal operation. By applying controlled voltages to generate hot holes that selectively remove abnormally injected electrons while preserving normally stored data, the patent transforms a harmful effect into a controlled process that maintains both data retention and threshold voltage distribution.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

2Manufacturing precision

If the channel potential is increased to remove abnormally injected electrons, then threshold voltage distribution is improved, but additional operations and time are required

Engineering Contradiction:
Improvethreshold voltage distributionVSAvoidoperation time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The patent merges the electron removal operation with the existing erase and program operations by integrating it into the normal memory device workflow. The control logic automatically performs the electron removal operation using the same peripheral circuits and control mechanisms already present in the device, thereby improving threshold voltage distribution without requiring separate dedicated hardware or significantly increasing operation time.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution effectively reduces the deterioration of threshold voltage distributions, enhancing data retention and reliability in memory devices by removing abnormally injected electrons post-erase operations.

Implementation Method 1

applying hot-hole generation voltage to remove trapped electrons

Methodology Applied
Scientific EffectHot-hole generation:

Implementation Method 2

abnormally injected electrons trapped in a charge storage layer of memory cells included in the selected memory block due to a back-tunneling phenomenon during the erase operation

Methodology Applied
Scientific EffectBack-tunneling phenomenon:

Data Source

PatentUS20240282394A1Memory device and method of operating the same
Publication Date: 2024.08.22 SK HYNIX INC
  • US20240282394A1 patent drawing
  • US20240282394A1 patent drawing
  • US20240282394A1 patent drawing

AI summary

Provided herein may be a memory device and a method of operating the same. The memory device may include a memory block including a plurality of memory strings, a peripheral circuit configured to perform an erase operation and a program operation on the memory block, and a control logic configured to control the peripheral circuit to perform the erase operation and the program operation on the memory block, wherein the control logic is configured to control the peripheral circuit to perform an abnormally injected electron removal operation that removes abnormally injected electrons trapped in a charge storage layer of a plurality of memory cells included in the memory block after the erase operation has been completed.