Memory Element Ion Conductor Layer Resistance Variation
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Solution Overview
Problem
Existing memory elements exhibit large variations in resistance values in initial and erase states, leading to insufficient changes during writing and erasing operations, which affects their performance and retention characteristics.
Innovation Solution
A memory element with a structure comprising a first electrode, a memory layer with an ion source layer containing chalcogen elements and metal elements, and two high-resistance layers with different compositions, where voltage or current pulses are applied to switch between low and high resistance states, reducing variations and improving retention characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single high-resistance layer is used in the memory layer, then the device structure is simple, but large variations in resistance values occur in initial and erase states
Solution Approach 1:
The memory layer is segmented into multiple high-resistance layers (first high-resistance layer and second high-resistance layer) with different compositions, where each layer contributes to reducing resistance variations independently. This segmentation allows the system to achieve better uniformity without excessive complexity by dividing the function across multiple specialized components.
Solution Approach 2:
The patent employs composite materials by combining high-resistance layers made of different materials (e.g., oxide and nitride, or different metal oxides) within the same memory layer. This composite structure leverages the complementary properties of different materials to correct defects and reduce variations in resistance values, achieving superior reliability.
2Productivity
If repeated writing and erasing operations are performed, then information can be updated, but the resistance values in write and erase states become intermediate values reducing the change magnitude
Solution Approach 1:
The multiple high-resistance layers are designed beforehand to compensate for the degradation that occurs during repeated operations. The different compositions provide a buffer that maintains the resistance contrast between write and erase states, cushioning against the intermediate value problem that arises from repeated cycling.
Solution Approach 2:
The patent utilizes parameter changes in the high-resistance layers' compositions (different materials with distinct electrical properties) to maintain optimal resistance characteristics throughout repeated operations. By carefully selecting and combining materials with different parameters, the system retains sufficient resistance change magnitude even after multiple writing and erasing cycles.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The use of multiple high-resistance layers with distinct compositions corrects defects and enhances the uniformity of the memory layer structure, reducing resistance variations and improving the retention of resistance values during repeated writing and erasing operations, thereby increasing the memory element's performance and durability.
Implementation Method 1
the metal contained in the electrode is diffused as ions into the ion conductor
Implementation Method 2
the metal element contained in the ion source layer is ionized and ions are diffused into the high-resistance layer
Implementation Method 3
the metal element deposited on the first electrode is ionized and dissolved in the ion source layer
Implementation Method 4
the metal element deposited on the first electrode is ionized and dissolved in the ion source layer
Data Source
AI summary
The present invention provides a memory element and a memory device realizing reduced variations in resistance values in an initial state or erase state of a plurality of memory elements and capable of retaining the resistance value in a write/erase state for writing/erasing operations of a plurality of times. The memory element includes a first electrode, a memory layer, and a second electrode in order. The memory layer has: an ion source layer containing at least one of chalcogen elements of tellurium (Te), sulfur (S), and selenium (Se) and at least one metal element selected from copper (Cu), silver (Ag), zinc (Zn), and zirconium (Zr); and two or more high-resistance layers having a resistance value higher than that of the ion source layer and having different compositions.


