Memory Element Power Stoppage Data Preservation

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Solution Overview

Problem

Existing signal processing circuits face challenges in quickly restoring data from external memory devices after power is restarted, making them unsuitable for short power-off periods to reduce power consumption.

Innovation Solution

A memory element with a logic circuit and memory circuit, including transistors and capacitors, that maintains a logic state and reduces power consumption by managing bias potentials to prevent data leakage during power stoppage and resumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If data is stored in external memory devices when power is stopped, then data can be preserved during power interruptions, but restoration time increases significantly after power is resumed

Engineering Contradiction:
Improvedata preservationVSAvoidrestoration time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent divides the memory system into two segments: a volatile memory circuit for fast access during operation, and a nonvolatile memory circuit for data preservation during power interruptions. This segmentation allows the system to maintain data reliability while enabling quick restoration by keeping data in the nonvolatile memory in a readily accessible state rather than requiring full restoration from external storage devices.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements preliminary action by transferring data to the nonvolatile memory circuit before power is completely stopped. This preliminary transfer ensures data is preserved in an accessible state within the memory device itself, so when power is restored, data can be quickly retrieved from the nonvolatile memory circuit without requiring time-consuming restoration from external memory devices.

Inventive Principle:
Principle #10Preliminary action

2Speed

If power is continuously supplied to volatile memory circuits, then data access speed is maintained, but power consumption increases

Engineering Contradiction:
Improvedata access speedVSAvoidpower consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The patent implements periodic action by selectively stopping power supply to the volatile memory circuit when data access is not required. The system periodically transfers data to the nonvolatile memory circuit before power interruption, maintains data there during the power-off period, and restores it when needed. This periodic operation pattern allows the system to achieve low power consumption during idle periods while maintaining data access capability when required.

Inventive Principle:
Principle #19Periodic action

3Use of energy by moving object

If power is stopped for short periods to reduce power consumption, then energy savings are achieved, but data restoration from external memory devices is too slow to be practical

Engineering Contradiction:
Improvepower consumptionVSAvoidrestoration speed
Core Design Contradiction:
Use of energy by moving objectVSProductivity

Solution Approach 1:

The patent introduces a nonvolatile memory circuit as an intermediary between the volatile memory circuit and external memory devices. This intermediary nonvolatile memory circuit serves as a buffer that can quickly retain and restore data during short power interruptions. When power is stopped briefly, data is preserved in this intermediary nonvolatile memory circuit rather than being transferred to slow external memory devices, enabling both power savings and quick restoration when power is resumed.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enables quick data restoration and improved reliability by maintaining stored logic states even when power is stopped, facilitating short power-off periods and reducing power consumption in semiconductor devices.

Implementation Method 1

The memory circuit includes a transistor and a capacitor

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS9502094B2Method for driving memory element
Publication Date: 2016.11.22 SEMICON ENERGY LAB CO LTD
  • US9502094B2 patent drawing
  • US9502094B2 patent drawing
  • US9502094B2 patent drawing

AI summary

To provide a memory element which keeps a stored logic state even without supply of power. To increase an effect of reducing power consumption by facilitating stop of supply of power to the memory element for a short time. Data (potential) held in a node in a logic circuit can be swiftly saved on a node where one of a source and a drain of the transistor and one electrode of the capacitor included in a memory circuit are connected by lowering a potential of the other electrode of a capacitor before a transistor is turned on. By making a potential of the other electrode of the capacitor when the transistor is in an off state higher than a potential of the other electrode of the capacitor when the transistor is in an on state, a potential of the node can be reliably held even without supply of power.