Memory Encoder Scrambling for Multi-Level Cell Bit Error Reduction
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Solution Overview
Problem
Memory systems using multiple level cells face high bit error rates due to uneven noise variances across different bit sequences, particularly affecting logical pages with higher probabilities of 1→0 errors compared to 0→1 errors, leading to suboptimal data retrieval and storage efficiency.
Innovation Solution
The implementation of an encoder and decoder system that scrambles data bits using multiple random sequences to reduce the occurrence of logical high values, with the encoder selecting the scrambled sequence having the lowest number of logical high values for storage, and the decoder descrambling using indication information to recover the original data bits, potentially aided by LDPC and CRC codes for error correction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If data bits are stored directly in multiple level cells without scrambling, then the storage process is simple and fast, but bit error rates are high due to uneven noise variances across different bit sequences
Solution Approach 1:
The encoder performs preliminary scrambling of data bits before storage by generating multiple scrambled sequences using different random sequences, evaluating their noise variance characteristics, and selecting the optimal sequence for storage. This preliminary action prepares the data in advance to withstand unequal noise variances during storage and retrieval.
Solution Approach 2:
The system changes the parameter of bit sequence representation by transforming original data bits into multiple scrambled sequences with different statistical properties. Each scrambled sequence has different noise variance characteristics, allowing selection of the sequence best suited for the specific storage conditions and error correction capabilities.
2Reliability
If multiple scrambled sequences are generated and evaluated to select the best one for storage, then bit error rates are reduced, but the encoding time and processing complexity increase
Solution Approach 1:
Instead of evaluating all possible random sequences, the system generates and evaluates only a limited number of scrambled sequences (e.g., 2-8 sequences). This partial action approach achieves sufficient error rate reduction without the excessive time cost of exhaustive search, finding an optimal balance between reliability improvement and processing time.
Solution Approach 2:
The system performs preliminary generation and evaluation of scrambled sequences during the encoding phase, storing not only the selected sequence but also metadata about the selection process. This preliminary preparation enables faster decoding by avoiding repeated evaluation during retrieval operations.
3Reliability
If the encoder selects scrambled sequences with lowest number of logical high values, then 1→0 errors are reduced, but the system becomes more complex requiring additional selection logic
Solution Approach 1:
The system applies different selection criteria to different aspects of the scrambled sequences: it evaluates noise variance characteristics globally across sequences, then applies local quality filtering by counting logical high values in specific bit positions. This hierarchical approach targets the specific 1→0 error problem while maintaining systematic complexity management.
Solution Approach 2:
The system replaces complex mechanical selection mechanisms with algorithmic evaluation. Instead of physical switching or mechanical selection devices, the encoder uses computational algorithms to evaluate scrambled sequences based on noise variance and logical high value counts, then selects the optimal sequence through data processing rather than mechanical means.
Data Source
AI summary
Encoders and decoders are provided for memory systems. An encoder scrambles data bits corresponding to a logical page, selected from among multiple logical pages, using a plurality of random sequences, to generate a plurality of scrambled sequences; selects, as an encoded sequence, a scrambled sequence among the plurality of scrambled sequences; and provides a memory device with the encoded sequence to store the encoded sequence in multiple level cells. The selected scrambled sequence has the lowest number of logical high values among the plurality of scrambled sequences.