Memory Encryption Controller Replay Protection

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Solution Overview

Problem

External memory regions storing secure software applications are vulnerable to malicious modifications and replay attacks, as encryption alone does not provide adequate integrity checks, allowing attackers to corrupt or substitute executable images, leading to security compromises.

Innovation Solution

A memory encryption controller with tree-based replay protection and Message Authentication Codes (MACs) is implemented, using XTS-AES encryption mode with an extended tweak to bind encryption to memory addresses and timestamps, ensuring cryptographic integrity checks and protecting against hardware attacks by making unauthorized modifications equivalent to random changes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If external memory is used to store secure software applications, then cost is reduced compared to integrated CPU memory, but security protection against malicious modifications and replay attacks is weakened

Engineering Contradiction:
ImprovecostVSAvoidsecurity protection
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The memory system is segmented into protected regions with distinct security attributes. The patent divides external memory into secure regions that can be independently encrypted and integrity-protected, allowing cost-effective external memory usage while maintaining security for critical software applications through region-specific protection mechanisms.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent combines multiple cryptographic protection mechanisms (encryption, MAC, replay protection) into a composite security system for external memory. This composite approach integrates AES encryption for confidentiality, CMAC for integrity verification, and counter-based replay protection, creating a robust security layer that enables safe external memory usage without requiring expensive integrated secure memory.

Inventive Principle:
Principle #40Composite materials

2Loss of information

If encryption is applied to external memory regions, then confidentiality is improved, but integrity check capability is insufficient against replay attacks

Engineering Contradiction:
ImproveconfidentialityVSAvoidintegrity check
Core Design Contradiction:
Loss of informationVSReliability

Solution Approach 1:

The patent merges encryption and integrity protection into a unified cryptographic operation. By combining AES encryption with CMAC (Cipher-based Message Authentication Code) and replay protection mechanisms, the system achieves both confidentiality and integrity verification in an integrated manner, preventing replay attacks while maintaining encrypted confidentiality of stored software applications.

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If memory regions are made invisible to the Operating System, then protection from software attacks is improved, but protection from hardware attacks requires additional access control mechanisms

Engineering Contradiction:
Improveprotection from software attacksVSAvoidaccess control mechanism
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements self-service security where the memory encryption and integrity protection system operates autonomously without requiring OS visibility or complex access control mechanisms. The cryptographic protection is applied transparently at the memory controller level, with security attributes embedded in the memory management unit, enabling the system to protect itself from both software and hardware attacks without additional complexity.

Inventive Principle:
Principle #25Self-service

Data Source

PatentEP2726991B1Method and apparatus for memory encryption with integrity check and protection against replay attacks
Publication Date: 2018.03.14 INTEL CORP
  • EP2726991B1 patent drawingFigure 1
  • EP2726991B1 patent drawingFigure 2
  • EP2726991B1 patent drawingFigure 3

AI summary

A method and apparatus to provide cryptographic integrity checks and replay protection to protect against hardware attacks on system memory is provided. A mode of operation for block ciphers enhances the standard XTS-AES mode of operation to perform memory encryption by extending a tweak to include a "time stamp" indicator. A tree-based replay protection scheme uses standard XTS-AES to encrypt contents of a cache line in the system memory. A Message-Authentication Code (MAC) for the cache line is encrypted using enhanced XTS-AES and a "time stamp" indicator associated with the cache line. The "time stamp indicator" is stored in a processor.