Memory Encryption for Interleaved Systems
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Solution Overview
Problem
Existing memory encryption systems face challenges in compatibility with address interleaving when multiple memory interfaces are used, leading to difficulties in load balancing and physical implementation in System on Chips (SoCs), particularly in ensuring secure data encryption across multiple memory interfaces.
Innovation Solution
A memory encryption method that utilizes a global interleaved memory space with an address interleaving scheme, where each channel has a local address pointer that increments periodically to re-encrypt data with a new key, ensuring secure key changes and compatibility with address interleaving, even when kicker transactions cross channel boundaries.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If one memory controller handles multiple memory interfaces with address interleaving, then device complexity is reduced, but physical implementation becomes difficult and load balancing is lost
Solution Approach 1:
The system divides the memory management function into separate memory controllers, with each controller dedicated to a specific memory interface. This segmentation allows each controller to be physically close to its corresponding interface, easing manufacturing and physical implementation while maintaining independent operation for load balancing.
2Device complexity
If one memory controller handles multiple memory interfaces, then device complexity is reduced, but load balancing is lost
Solution Approach 1:
The system assigns each memory interface to a dedicated memory controller, enabling independent operation and load distribution across multiple controllers. This segmentation restores load balancing capability while keeping the overall system architecture simple through clear functional separation.
3Ease of manufacture
If one memory controller is assigned to each memory interface, then physical implementation is easier and load balancing is achieved, but encryption compatibility with address interleaving becomes problematic
Solution Approach 1:
The patent introduces an intermediary mechanism where each memory controller maintains a local address pointer that tracks the current encryption key's valid range. This intermediary structure enables each controller to independently manage encryption keys while remaining compatible with the global address interleaving scheme, resolving the compatibility issue.
4Reliability
If encryption keys are changed periodically, then security is enhanced, but system complexity increases
Solution Approach 1:
Each memory controller autonomously manages its own encryption key using a local address pointer to track the current key's valid address range. When the pointer reaches the end of its range, the controller automatically increments it to point to the next key. This self-service mechanism enhances security through periodic key changes without requiring complex centralized key management.
Data Source
AI summary
A method for managing an operation of an encrypted global interleaved memory space physically implemented according to an interleaving addressing scheme in encrypted memory banks of a plurality of memories respectively belonging to a plurality of channels. The method includes providing each channel with a local address pointer configured to be incrementally moved along the global memory space each time the global memory space is addressed at the current address pointed by the pointer, and in an absence of movement of the local pointer of a channel during a time period, addressing the global memory space from the channel through the address interleaving with a specific transaction at the current address, and upon reception at the channel of the specific transaction having been initiated by the channel, re-encrypting data located at the current address with a new encryption key and incrementing the local address pointer to its next position.