Memory Encryption Pipeline for Sniffing-Resistant Transactions

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Solution Overview

Problem

The increasing threat of physical sniffing of memory transactions in server and network infrastructure deployments necessitates robust security measures to prevent malicious actors from accessing sensitive information.

Innovation Solution

A user-configurable encryption pipeline with a pipelined encryption algorithm that encrypts write operations and decrypts read operations, utilizing a user-configurable block size and number of rounds, and incorporating a key scheduler at each stage to secure memory transactions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If physical sniffing protection is implemented through encryption, then security against malicious actors is improved, but device complexity increases due to the encryption pipeline requirements

Engineering Contradiction:
Improvesecurity protectionVSAvoidencryption pipeline
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The encryption algorithm is divided into multiple pipeline stages, with each stage performing a specific round of encryption operations. This segmentation allows the encryption function to be distributed across multiple processing units, making the complex security protection task manageable and implementable through modular design.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The encryption pipeline incorporates user-configurable parameters including block size and number of rounds, allowing the system to dynamically adjust the encryption strength and performance characteristics based on security requirements and available resources.

Inventive Principle:
Principle #15Dynamics

2Productivity

If a pipelined encryption algorithm with multiple stages is used, then encryption performance is improved, but device complexity increases due to multiple stages and key schedulers

Engineering Contradiction:
Improveencryption performanceVSAvoidpipeline stages
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The encryption process is segmented into multiple pipeline stages, where each stage handles a specific round of encryption. This enables parallel processing of different data blocks through the pipeline, improving throughput while maintaining the complexity manageable through modular organization.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The pipelined design ensures continuous encryption processing by maintaining multiple stages of operation simultaneously, with each stage working on different portions of data. This continuous action improves encryption performance by eliminating idle time between processing steps.

Inventive Principle:
Principle #20Continuity of useful action

3Adaptability or versatility

If user-configurable block size and rounds are implemented, then adaptability to different security needs is improved, but device complexity increases due to configuration options

Engineering Contradiction:
Improveuser configurabilityVSAvoidconfiguration parameters
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The encryption system incorporates user-configurable parameters for block size and number of rounds, allowing the encryption algorithm to dynamically adapt to different security requirements and performance constraints through software configuration rather than hardware redesign.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The encryption pipeline is designed to handle multiple configuration options within a single unified architecture, making the system universally applicable to various security needs without requiring separate hardware implementations for different encryption parameters.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS12627467B2Memory transaction protection methods and circuitry
Publication Date: 2026.05.12 AXIADO CORP
  • US12627467B2 patent drawing
  • US12627467B2 patent drawing
  • US12627467B2 patent drawing

AI summary

Described herein, in certain embodiments, are computer-implemented memory protection systems comprising: a memory; and circuitry comprising an encryption algorithm and configured to perform operations comprising: encrypt, using the encryption algorithm, write operations to the memory; and decrypt, using the encryption algorithm, read operations from the memory. Further provided herein, in certain embodiments, are computer implemented method for memory protection.