Volatile Memory Encryption via 8-bit Sub-block Segmentation
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Solution Overview
Problem
Existing encryption methods for protecting content in external volatile memories, such as DES, 3DES, and AES, suffer from latency issues and inefficiencies due to block size mismatches and high processor cycles, which impede throughput and increase power consumption.
Innovation Solution
A scalable encryption process that divides N-bit data blocks into smaller sub-blocks for 8-bit encryption, using a non-linear encryption algorithm with multiple rounds and key whitening, allowing for efficient encryption and decryption within a single processor cycle, eliminating the need for read-decrypt-modify-encrypt-write cycles.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If DES, 3DES or AES encryption algorithms are used to protect content files, then security against unauthorized access and copying is improved, but processing latency increases substantially due to requiring many processor cycles (16 or more cycles) to encrypt or decrypt a block of data
Solution Approach 1:
The patent divides the N-bit data block into multiple smaller sub-blocks (e.g., 8-bit sub-blocks) and encrypts each sub-block independently. This segmentation allows the encryption process to complete within a single processor cycle by processing only 8 bits at a time, rather than requiring multiple cycles for larger block sizes. The segmented approach maintains security while dramatically reducing processing latency.
2Reliability
If encryption block size is greater than 8-bits (e.g., 32-bit or 64-bit encryption), then encryption strength is improved, but every write transaction smaller than block size requires read-decrypt-modify-encrypt-write cycle, which impedes throughput and increases power consumption
Solution Approach 1:
The patent applies encryption at the local 8-bit level rather than requiring global block-level encryption. By matching the encryption block size to the natural word size of the processor (8-bit boundaries), the system can encrypt data in-place during write operations without requiring read-modify-write cycles. This local quality approach maintains encryption strength while eliminating throughput penalties.
3Reliability
If encryption block size is greater than 8-bits, then encryption strength is improved, but the same read-decrypt-modify-encrypt-write cycle requirement increases power consumption of the system
Solution Approach 1:
The patent segments the encryption process into 8-bit sub-blocks that can be processed independently in a single write cycle. This eliminates the need for read-modify-write operations, thereby reducing the number of memory access cycles and associated power consumption. The segmentation strategy maintains cryptographic strength while optimizing for lower energy usage in mobile and embedded systems.
Data Source
AI summary
A data processing apparatus includes a volatile memory, a random number generator adapted for generating random numbers from which one or more keys are generated, and a memory encryption unit (MEU). The MEU is configured to receive an N-bit block of data and to divide the N-bit block of data into two more sub-blocks of data, where each sub-block contains fewer than N-bits. The MEU is further configured to encrypt each sub-block of data using the one more keys, to combine the encrypted sub-blocks into an N-bit block of encrypted data, and to write the encrypted N-bit block of data to the volatile memory.