Memory Erase Cycle Healing via High Voltage Pulse
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Solution Overview
Problem
Conventional memory sub-systems face reliability issues due to electron traps and ION contamination caused by extreme temperatures during the InfraRed Reflow process, leading to higher error rates and reduced data retention, which are only mitigated by repetitive program/erase cycles that consume significant resources.
Innovation Solution
A pre-program erase process is implemented, applying a high voltage pulse to memory cells to move electrons between states and cause IONs to move away from the charge storage layer, effectively 'healing' the memory component by repeatedly changing voltage states before writing new data, thereby improving reliability without the overhead of conventional methods.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If conventional memory sub-systems undergo InfraRed Reflow process, then manufacturing is completed, but electron traps and ION contamination occur leading to higher error rates
Solution Approach 1:
The patent applies a high voltage pulse to memory cells before performing erase operations to proactively move electrons out of trap states and relocate IONs away from the charge storage layer. This preliminary action prevents electron traps and ION contamination from degrading memory reliability, addressing the harmful effects of the InfraRed Reflow process before they can cause errors.
Solution Approach 2:
The patent converts the harmful effects of InfraRed Reflow (electron traps and ION contamination) into a treatable condition by using high voltage pulses to actively remove electrons from trap states and relocate IONs. This transforms the manufacturing-induced damage into a reversible state that can be corrected through voltage pulsing, thereby improving reliability without requiring process changes.
2Reliability
If repetitive program/erase cycles are performed to mitigate electron traps and ION contamination, then reliability improves, but resource consumption increases significantly
Solution Approach 1:
The patent extracts electrons from trap states using high voltage pulses applied before erase operations. By removing trapped electrons proactively, the system eliminates the need for multiple repetitive program/erase cycles that would otherwise be required to clear these traps, thereby reducing energy consumption while maintaining reliability improvements.
Solution Approach 2:
The patent performs electron removal and ION relocation as a preliminary step before erase operations. This upfront action prevents the accumulation of electron traps and ION contamination that would otherwise require extensive repetitive cycling to mitigate, significantly reducing the total resource consumption needed to maintain memory reliability.
3Reliability
If high voltage pulse is applied to memory cells, then electrons are moved between states and IONs are relocated, but additional processing steps are added
Solution Approach 1:
The patent combines the high voltage pulse application with the existing erase operation sequence. The voltage pulse is applied to memory cells as part of the erase process workflow, merging the electron removal and ION relocation functions with the standard erase operation. This integration minimizes additional processing complexity while achieving reliability improvements through the combined action of pulsing and erasing.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the reliability of memory components by eliminating electron traps and restoring data retention capabilities, reducing error correction operations and resource usage, while improving the performance of the memory sub-system.
Implementation Method 1
applying a high voltage pulse to memory cells to move electrons between states
Implementation Method 2
cause IONs to move away from the charge storage layer
Data Source
AI summary
An indication to perform a write operation at a memory component can be received. A voltage pulse can be applied to a destination block of the memory component to store data of the write operation, the voltage pulse being at a first voltage level associated with a programmed state. An erase operation for the destination block can be performed to change the voltage state of the memory cell from the programmed state to a second voltage state associated with an erased state. A write operation can be performed to write the data to the destination block upon changing the voltage state of the memory cell to the second voltage state.


