Memory Sub-System Erase Indicator for Retired Block Verification

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Solution Overview

Problem

Conventional memory sub-systems lack verification of successful data erasure during sanitize operations, particularly for retired blocks that may have failed previous erase cycles, leading to potential data recovery issues.

Innovation Solution

Implementing an erase indicator to track the success or failure of erase cycles during sanitize operations and providing a status indicator for each block, ensuring that all erase cycles are successful before marking data as fully erased.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional sanitize operations are performed without verification, then the operation completes quickly, but data erasure reliability is compromised

Engineering Contradiction:
Improvedata erasure reliabilityVSAvoidsanitize operation speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent implements a feedback mechanism by performing verification read operations after erase cycles to confirm successful data erasure. The controller reads back data from memory blocks after erasing and verifies that the read data matches expected erased patterns, providing feedback on erasure success and enabling reliable data destruction confirmation.

Inventive Principle:
Principle #23Feedback

2Reliability

If verification operations are added to sanitize processes, then data erasure reliability improves, but operation time increases

Engineering Contradiction:
Improveerasure verificationVSAvoidsanitize operation time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies partial verification by selecting specific memory blocks for verification read operations rather than verifying every block. The controller determines which blocks require verification based on erasure status and retirement status, performing verification only on blocks where it is most critical, thus reducing overall verification time while maintaining reliability for critical blocks.

Inventive Principle:
Principle #16Partial or excessive action

3Object-affected harmful factors

If retired blocks are handled with standard erase procedures, then device complexity remains low, but data security is compromised

Engineering Contradiction:
Improvedata securityVSAvoidblock management complexity
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The patent implements local quality by applying different erase and verification procedures to different types of memory blocks. Retired blocks undergo enhanced verification compared to active blocks, with the controller performing additional read operations specifically on retired blocks to confirm complete data erasure. This targeted approach enhances security for retired blocks without unnecessarily complicating the management of all blocks.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS11775198B2Data erasure in memory sub-systems
Publication Date: 2023.10.03 MICRON TECHNOLOGY INC
  • US11775198B2 patent drawing
  • US11775198B2 patent drawing
  • US11775198B2 patent drawing

AI summary

Various examples are directed to memory systems comprising a component and a processing device. The memory system may comprise a plurality of blocks. A first portion of the plurality of blocks may be retired and a second portion of the plurality of blocks may be unretired. The processing device receives a sanitize operation for the plurality of blocks. The processing device initiates a first erase cycle at a first retired block of the plurality of blocks. The processing device determines that the first erase cycle was not successful and sets an erase indicator to false.