Memory Erase Suspend-Resume Control to Prevent Over-Erase
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional erase operations in semiconductor memory devices often lead to over-erase due to suspension events, which can result in uncorrectable errors and inefficient use of resources.
Innovation Solution
Implement a method where erase-verify operations are performed on a portion of selected memory cells after a suspension event, adjusting the erase pulse duration based on the count of failed memory cells that fail the erase operation, and the erase pulse duration is dynamically adjusted to optimize the erase process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If erase operations are performed continuously without suspension, then erase speed is improved, but over-erase occurs leading to uncorrectable errors
Solution Approach 1:
The patent performs a preliminary erase-verify operation on a first portion of memory cells before completing the erase operation on all memory cells. This preliminary verification detects whether the first portion has been sufficiently erased, allowing the system to take preliminary action (stopping the erase operation) before over-erase can occur on the entire memory block, thus maintaining both speed and reliability
Solution Approach 2:
The patent divides the memory block into multiple portions (first portion and second portion) and processes them differently during the erase operation. The first portion undergoes erase-verify while the second portion is being erased, allowing segmented verification that prevents over-erase while maintaining overall erase efficiency
2Reliability
If erase-verify operations are performed on all memory cells after suspension, then reliability is improved, but erase time increases
Solution Approach 1:
The patent performs erase-verify on only a first portion of memory cells rather than all memory cells in the block. This partial verification action is sufficient to detect over-erase conditions without the time penalty of verifying every cell, thus balancing reliability with time efficiency
Solution Approach 2:
The erase-verify operation on the first portion serves as a preliminary check that can predict the state of the entire memory block. This preliminary verification on a subset allows the system to make decisions about the overall erase operation without completing full verification on all cells, reducing total verification time
Data Source
AI summary
The memory device includes a memory block with an array of memory cells that are arranged in a plurality of word lines. The plurality of word lines includes a plurality of selected word lines that contain selected memory cells to be erased. The memory device also includes circuitry for erasing the selected memory cells in an erase operation. During the erase operation, the circuitry is configured to apply at least one erase pulse to the memory block to erase the selected memory cells. The circuitry is also configured to suspend the at least one erase pulse for a suspend duration. After the suspend duration and before applying a next erase pulse to the memory block, the circuitry is configured to perform an erase-verify operation on only a portion of the selected memory cells.