Memory Segment Erase Policy Switching for Reliability and Throughput
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Solution Overview
Problem
Memory devices experience reliability degradation due to residual holes trapped in the semiconductor substrate after erase operations, leading to threshold voltage shifts and reduced read window budget, which is exacerbated by insufficient delays between erase and program cycles.
Innovation Solution
Adaptive selection of erase policies based on lifecycle states of memory segments, employing zero-delay or non-zero delay strategies like EOD, JiTE, and EIA to manage residual holes, with intermediate pool management and low stress refresh erase (LSRE) to minimize programming disturbances.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a non-zero delay erase policy is applied to all memory segments, then reliability is improved by allowing residual holes to dissipate, but productivity decreases due to extended erase operation time
Solution Approach 1:
The patent applies different erase policies (zero-delay or non-zero delay) to different memory segments based on their lifecycle states. Young segments use zero-delay erase for speed, while aging segments use non-zero delay erase for reliability, creating local optimization rather than uniform treatment.
Solution Approach 2:
The erase policy is dynamically adjusted based on the lifecycle state of memory segments. The system transitions segments between different erase policies as they age, making the erase operation adaptive rather than static, thereby optimizing both reliability and productivity throughout the device lifespan.
2Productivity
If a zero-delay erase policy is applied to all memory segments, then productivity is improved by eliminating delay time, but reliability deteriorates due to residual holes causing threshold voltage shifts
Solution Approach 1:
The patent applies different erase policies (zero-delay or non-zero delay) to different memory segments based on their lifecycle states. Young segments use zero-delay erase for speed, while aging segments use non-zero delay erase for reliability, creating local optimization rather than uniform treatment.
Solution Approach 2:
The erase policy is dynamically adjusted based on the lifecycle state of memory segments. The system transitions segments between different erase policies as they age, making the erase operation adaptive rather than static, thereby optimizing both reliability and productivity throughout the device lifespan.
3Reliability
If erase operations are performed frequently to maintain reliability, then reliability is improved, but wear on memory cells increases leading to reduced device lifespan
Solution Approach 1:
The patent applies different erase policies to different memory segments based on their lifecycle states. By targeting only aging segments with non-zero delay erase rather than all segments uniformly, the system reduces unnecessary erase operations on healthy cells, thereby extending overall device lifespan while maintaining reliability.
Data Source
AI summary
A system with a memory device and a processing device operatively coupled with the memory device, to perform operations including identifying a lifecycle state associated with a segment of the memory device, selecting, based on the lifecycle state, an erase policy for performing an erase operation with respect to the segment, and causing the erase operation to be performed with respect to the segment in accordance with the erase policy.