Memory Erase Retention Control for Charge Gain Reliability

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Solution Overview

Problem

Conventional memory subsystems face challenges in maintaining data reliability due to charge gain issues in memory cells, particularly in non-volatile memory devices like QLCs and PLCs, leading to reduced read window budget and performance degradation, which existing techniques like erase on demand fail to adequately address.

Innovation Solution

Implementing a memory subsystem that immediately erases memory upon invalidation and performs charge gain checks, maintaining a free pool of memory through shallow erase operations to ensure data reliability and improve sequential write throughput.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If erase on demand technique is used to avoid charge gain issues, then data reliability is improved, but sequential write throughput is reduced due to additional erase time

Engineering Contradiction:
Improvedata reliabilityVSAvoidsequential write throughput
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies preliminary action by performing erase operations in advance on memory blocks that are invalidated or no longer needed, rather than waiting until they are actually needed for new writes. This creates a pool of pre-erased blocks ready for immediate use, eliminating the need to perform erase operations during sequential write operations, thus maintaining both data reliability and write throughput

Inventive Principle:
Principle #10Preliminary action

2Productivity

If memory is erased in advance to improve performance, then sequential write throughput is improved, but charge gain issues arise leading to reduced read window budget

Engineering Contradiction:
Improvesequential write throughputVSAvoidread window budget
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies local quality by performing charge gain checks selectively on specific memory blocks that have been erased and are candidates for reuse, rather than checking all erased blocks uniformly. This targeted approach ensures that blocks with charge gain issues are identified and handled appropriately while minimizing the impact on overall read window budget and maintaining high write throughput

Inventive Principle:
Principle #3Local quality

3Reliability

If charge gain checks are performed on all erased memory, then data reliability is improved, but system complexity and processing time increase

Engineering Contradiction:
Improvedata reliabilityVSAvoidsystem complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies segmentation by dividing the memory space into distinct pools: a free pool of pre-erased blocks ready for use, a valid pool of blocks containing current data, and a pool of blocks undergoing charge gain checks. This segmentation allows charge gain checks to be performed on a manageable subset of blocks rather than all erased memory, reducing system complexity while maintaining data reliability through targeted verification

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS12481426B2Optimizing data reliability using erase retention
Publication Date: 2025.11.25 MICRON TECHNOLOGY INC
  • US12481426B2 patent drawing
  • US12481426B2 patent drawing
  • US12481426B2 patent drawing

AI summary

Methods, systems, and apparatuses include moving a portion of memory to a garbage pool in response to determining that the portion of memory is invalid. The portion of memory is erased in response to determining that the portion of memory is invalid. A request to move an additional portion of memory to a free pool from the garbage pool is received. A free pool includes a queue including erased portions of memory, which serve as next portions of memory to fulfill subsequent cursor requests. The erased portion of memory is moved from the garbage pool to the free pool.