Semiconductor Memory Block Erase Voltage Control
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Solution Overview
Problem
Flash memory devices experience performance deterioration due to non-uniform programming operations, leading to reduced device performance over time, necessitating a method to manage and stabilize the performance of semiconductor memory devices.
Innovation Solution
A semiconductor memory device that measures and manages the deterioration of memory blocks by controlling and comparing erase voltages, enabling only less deteriorated blocks for subsequent write operations, ensuring uniform usage and extended device lifespan.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If programming operations are frequently performed on specific memory cells, then data update capability is improved, but memory cell performance deteriorates
Solution Approach 1:
The memory device is divided into multiple memory blocks, each with independent erase voltage control. This segmentation allows different blocks to be managed independently, enabling wear leveling across blocks rather than uniform degradation from frequent programming of specific cells.
Solution Approach 2:
The invention dynamically adjusts erase voltage parameters based on measured deterioration levels of each memory block. By changing the erase voltage parameter adaptively, the system compensates for performance degradation and maintains reliable operation even after frequent programming operations.
2Productivity
If erase voltage is increased to improve erasing performance, then erasing capability is improved, but memory block deterioration accelerates
Solution Approach 1:
The erase voltage is made dynamic rather than fixed. The system measures the deterioration degree of each memory block and adjusts the erase voltage accordingly. This dynamic adjustment allows optimal erasing performance while preventing excessive stress that would accelerate deterioration.
Solution Approach 2:
The invention implements a feedback mechanism where the deterioration degree of memory blocks is continuously measured and used to adjust future erase operations. This feedback loop ensures that erase voltage is optimized for current block conditions, balancing erasing capability with longevity.
3Device complexity
If memory blocks are used uniformly without management, then device simplicity is maintained, but performance stability deteriorates
Solution Approach 1:
The system performs preliminary measurement of erase voltage for each memory block before write operations. This preliminary action identifies the deterioration degree in advance, allowing the control circuit to make informed decisions about block selection and voltage adjustment before actual data operations occur.
Solution Approach 2:
Different erase voltage parameters are applied to different memory blocks based on their individual deterioration levels. This parameter differentiation maintains performance stability across blocks while managing complexity through systematic rather than random variations.
Data Source
AI summary
A method for driving a semiconductor memory device includes controlling a plurality of erase voltages for a plurality of memory blocks, respectively, comparing the plurality of controlled erase voltages, and determining whether or not to enable the plurality of memory blocks for a subsequent write operation in response to a result of the comparison.