Nonvolatile Memory Erase Voltage Segmentation

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Solution Overview

Problem

Current data storage devices face challenges in densely forming an erased state distribution of memory cells, which affects their storage capacity and efficiency, especially in portable electronic devices that require high storage capacity for large files.

Innovation Solution

A data storage device with a nonvolatile memory device that employs a controller to execute both normal and fine erase commands, utilizing specific erase loops with varying voltages to achieve a denser erased state distribution of memory cells, allowing for more precise threshold voltage adjustments.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a normal erase command is used to erase memory cells, then the erase operation is completed quickly, but the erased state distribution is not dense enough

Engineering Contradiction:
Improveerase speedVSAvoiderased state distribution density
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The erase operation is segmented into two distinct phases: a normal erase loop that applies a first erase voltage for rapid erasure, followed by a fine erase loop that applies a second erase voltage for precise threshold voltage adjustment. This segmentation allows the system to achieve both fast erasure and dense erased state distribution by addressing different aspects of the erase process separately.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent changes the voltage parameter between the two erase loops. The normal erase loop uses a first erase voltage optimized for speed, while the fine erase loop uses a second erase voltage optimized for precision. By changing this critical parameter, the system transitions from a speed-optimized mode to a precision-optimized mode, resolving the contradiction between erase speed and distribution density.

Inventive Principle:
Principle #35Parameter changes

2Manufacturing precision

If a fine erase command is used to achieve dense erased state distribution, then the erase precision is improved, but the erase operation time increases

Engineering Contradiction:
Improveerased state distribution densityVSAvoiderase speed
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The normal erase loop is executed first as a preliminary action to perform the bulk erasure work quickly. This preliminary action removes the majority of the charge from the memory cells, bringing them close to the erased state. The fine erase loop then performs the precise final adjustments. This preliminary action approach allows the system to achieve dense distribution without paying the full time cost for the entire duration.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The fine erase loop applies a controlled amount of additional erasure beyond what the normal erase loop achieves. Rather than using the fine erase voltage for the entire erase duration, the system uses it only for the necessary additional precision work. This partial application of the precision-oriented erase method minimizes the time penalty while still achieving the desired dense erased state distribution.

Inventive Principle:
Principle #16Partial or excessive action

3Quantity of substance

If high integration degree memory cells are used to increase storage capacity, then the storage density is improved, but the control over erase operations becomes more difficult

Engineering Contradiction:
Improvestorage capacityVSAvoiderase control complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The erase control system is made dynamic by allowing it to switch between two different erase modes (normal and fine) with different voltage characteristics. This dynamic control capability enables the system to adapt to the specific requirements of high integration degree memory cells, providing both rapid erasure when possible and precise adjustment when needed, thereby managing the increased control complexity inherent in densely integrated cells.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS9773561B1Nonvolatile memory device and data storage device including the same
Publication Date: 2017.09.26 MIMIRIP LLC
  • US9773561B1 patent drawing
  • US9773561B1 patent drawing
  • US9773561B1 patent drawing

AI summary

A data storage device includes a nonvolatile memory device; and a controller suitable for providing a normal erase command or a fine erase command to the nonvolatile memory device, wherein the nonvolatile memory device performs a first normal erase loop in which a first normal erase voltage and an erase verify voltage are applied to erase target memory cells, according to the normal erase command, and performs a first fine erase loop in which a first fine erase voltage and the erase verify voltage are applied to the erase target memory cells, according to the fine erase command.