Nonvolatile Memory Erasure Conditional Pre-Programming

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Solution Overview

Problem

Conventional erasure techniques for nonvolatile memory devices, such as flash memory, often fail to ensure complete erasure of partially programmed portions, leading to errors during subsequent reprogramming and reading operations.

Innovation Solution

Conditional pre-programming techniques are employed by a memory controller to determine if a memory block is partially programmed, and if so, it uniformly sets all pages to an intermediate threshold voltage level before applying an erasure voltage pulse to ensure full erasure, thereby preventing incomplete erasure and associated errors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional erasure techniques are applied to partially programmed nonvolatile memory, then erasure speed is maintained, but complete erasure cannot be ensured leading to programming errors

Engineering Contradiction:
Improveerasure completenessVSAvoiderasure process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by detecting the programming state of memory blocks before erasure and conditionally pre-programming only those blocks that are partially programmed. This ensures that subsequent erasure operations can completely clear all pages, including partially programmed ones, without requiring complex per-page erasure procedures.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements local quality by applying different erasure strategies to different memory blocks based on their programming state. Fully programmed blocks receive standard erasure, while partially programmed blocks receive conditional pre-programming followed by erasure, optimizing both reliability and efficiency for each specific case.

Inventive Principle:
Principle #3Local quality

2Reliability

If conditional pre-programming is applied to ensure complete erasure, then programming errors are prevented, but additional time is required for the pre-programming step

Engineering Contradiction:
Improveprogramming error preventionVSAvoiderasure time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies partial action by performing pre-programming only on memory blocks that are detected to be partially programmed, rather than all blocks. This selective approach prevents programming errors in vulnerable blocks while minimizing the additional time required, as the pre-programming step is skipped for blocks that don't need it.

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

By detecting the programming state beforehand and conditionally applying pre-programming, the system performs the necessary preparation action only when needed, ensuring reliability without unnecessarily extending erasure time for all blocks.

Inventive Principle:
Principle #10Preliminary action

3Productivity

If all memory blocks are fully erased using conventional techniques, then erasure speed is maintained, but partially programmed portions may retain residual data causing bit failures

Engineering Contradiction:
Improveerasure speedVSAvoidbit failure rate
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies local quality by identifying and treating only partially programmed memory blocks with conditional pre-programming followed by erasure, while leaving fully programmed blocks to undergo standard rapid erasure. This targeted approach maintains high overall erasure speed while eliminating bit failures in the vulnerable partially programmed blocks.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The system performs preliminary detection of programming states and conditionally applies pre-programming to prepare partially programmed blocks for complete erasure, ensuring that subsequent erasure operations can reliably clear all data without leaving residual charges that would cause bit failures.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS9543024B2Nonvolatile memory erasure techniques
Publication Date: 2017.01.10 SK HYNIX NAND PRODUCT SOLUTIONS CORP
  • US9543024B2 patent drawing
  • US9543024B2 patent drawing
  • US9543024B2 patent drawing

AI summary

Embodiments of the present disclosure describe methods, apparatus, and system configurations for conditional pre-programming of nonvolatile memory before erasure. In one instance, the method includes receiving a request to erase information in a portion of the nonvolatile memory device, in which the portion includes a plurality of storage units, determining whether one or more storage units of the plurality of storage units included in the portion of the non-volatile memory device are programmed, pre-programming the portion of the non-volatile memory device if the one or more storage units are determined to be programmed, and erasing the pre-programmed portion of the non-volatile memory device. A number of determined programmed storage units may not exceed a predetermined value. Other embodiments may be described and/or claimed.