Nonvolatile Memory Erasure Pre-Reading Verification
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Solution Overview
Problem
Current non-volatile memory erasure methods are inefficient and complex, particularly when dealing with full-erasure states, as they require unnecessary pre-programming processes that increase execution time and process complexity.
Innovation Solution
A method and device for non-volatile memory erasure that performs pre-reading verification on a target erasure area before proceeding with erasure, skipping pre-programming verification if successful, and only performing pre-programming verification if pre-reading verification fails, thereby optimizing the erasure process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If pre-programming process is added before erasure operation to ensure threshold voltage convergence, then manufacturing precision of threshold voltage distribution is improved, but loss of time increases due to unnecessary programming steps
Solution Approach 1:
The patent applies preliminary action by performing a pre-reading verification operation before the erasure operation to check the current state of memory cells. This preliminary check identifies whether pre-programming is actually needed, allowing the system to skip unnecessary pre-programming steps when the target area is already in erasure state, thus reducing time loss while maintaining threshold voltage convergence when needed
Solution Approach 2:
The patent implements feedback by using the result of the pre-reading verification operation to dynamically control whether to proceed with pre-programming or directly perform erasure. The verification feedback mechanism allows the system to adapt its processing path based on the actual state of memory cells, avoiding unnecessary operations and optimizing the balance between precision and time efficiency
2Reliability
If pre-programming verification is always performed before erasure, then reliability of erasure operation is improved, but device complexity increases due to additional verification steps
Solution Approach 1:
The patent uses preliminary action by implementing a pre-reading verification step that performs a lightweight initial check before more complex pre-programming verification. This preliminary verification simplifies the overall process by quickly determining whether full verification and pre-programming are necessary, thereby maintaining reliability while reducing perceived complexity
Solution Approach 2:
The patent applies segmentation by dividing the verification process into two distinct stages: pre-reading verification (initial state check) and pre-programming verification (detailed verification if needed). This segmentation allows the system to perform only the necessary verification steps based on the initial check, reducing overall process complexity while maintaining reliability through conditional detailed verification
3Productivity
If direct erasure is performed on mixed state memory cells, then productivity is improved by eliminating pre-programming steps, but manufacturing precision deteriorates due to threshold voltage divergence
Solution Approach 1:
The patent applies preliminary action by performing a pre-reading verification operation that quickly assesses the state of memory cells before erasure. This preliminary check enables the system to identify uniform erasure candidates that can undergo direct erasure without pre-programming, improving productivity while ensuring that only appropriate candidates are selected for direct processing
Solution Approach 2:
The patent implements local quality by applying different processing paths to different regions or groups of memory cells based on their individual states. The pre-reading verification identifies which specific memory cells or blocks are already in erasure state and can proceed directly to erasure, while others require pre-programming. This localized approach optimizes productivity for suitable cells while maintaining precision where needed
Data Source
AI summary
Disclosed are non-volatile memory erasure method and device for solving the problem of unnecessary time expenditure and complex process of the current erasure operation. The method comprises: after receiving an erasure instruction, performing a pre-reading verification on the target erasure area corresponding to the erasure instruction; if the pre-reading verification passes, then performing an erasure operation on the target erasure area; if not, then performing pre-programming verification on the target erasure area, and after the pre-programming verification passes, performing the erasure operation on the target erasure area. The method of the present application can eliminate the unnecessary pre-programming verification process while ensuring the target erasure area is in a full-erasure state before the erasure operation, thus saving erasure time and simplifying the erasure process.