Non-Volatile Memory Error Processing for Faster 2-Byte Correction
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Solution Overview
Problem
Existing semiconductor memory technologies face inefficiencies in correcting 2-byte errors, as current methods using Reed-Solomon codes are relatively slow and require complex determinant calculations for error detection and correction.
Innovation Solution
Implementing a dual error code system where a second error code, linked to the physical structure of the memory, assists the first error code (such as Reed-Solomon) in identifying and correcting byte errors by transforming data into unique code words, allowing for efficient detection and correction of additional byte errors without relying solely on the first error code.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If Reed-Solomon code is used for correcting 2-byte errors, then error correction capability is improved, but correction speed deteriorates
Solution Approach 1:
The patent segments the error correction process into two distinct stages: first using a simplified error code for quick detection of byte errors, then applying Reed-Solomon code only when needed for correction. This segmentation allows the system to achieve both fast error detection and reliable correction capability.
Solution Approach 2:
The patent applies partial action by using a lightweight error detection code for all bytes first, and only invoking the full Reed-Solomon correction process for bytes that actually contain errors. This avoids the overhead of applying complex correction to all bytes regardless of error presence.
2Measurement precision
If Reed-Solomon code is used for byte error correction, then error detection precision is improved, but computational complexity increases
Solution Approach 1:
The patent divides error processing into detection and correction phases with different computational requirements. The detection phase uses simple parity or checksum operations, while the computationally intensive Reed-Solomon correction is only performed on identified error cases.
Solution Approach 2:
The patent introduces an intermediary error detection code that acts as a filter between data storage and full error correction processing. This intermediary layer quickly identifies suspicious bytes, allowing the complex Reed-Solomon algorithm to focus only on problematic areas.
3Productivity
If dual error code system is implemented, then error correction efficiency is improved, but system complexity increases
Solution Approach 1:
The dual error code system segments functionality into a first error code for detection and a second error code for correction. This functional segmentation allows each code to be optimized for its specific purpose, improving overall efficiency while managing complexity through clear division of labor.
Solution Approach 2:
The first error code serves multiple functions: it provides basic error detection and also identifies candidate bytes for further correction processing. This multi-functionality reduces the need for separate specialized components, managing system complexity while maintaining high correction efficiency.
Data Source
AI summary
A solution is proposed for error processing, wherein n byte error positions of n byte errors are predefined (where n is a positive integer), wherein this involves determining whether there is a further byte error position on the basis of the n byte error positions and on the basis of n+1 error syndrome components of a first error code.