Semiconductor Memory Error Bit Counting for Full Pass/Fail Readout
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Solution Overview
Problem
Existing semiconductor memory devices face inconsistencies in write and read data due to physical errors, with existing memory defect analysis devices failing to obtain pass/error information for all bits, necessitating improved error bit counting and detection.
Innovation Solution
A semiconductor memory device incorporating an error bit detection unit and bit counting unit to detect and count error bits, ensuring consistency between read and expected data, with a structure that includes XOR gate groups, bit counting units, and accumulation units to determine error and pass bits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If error bits are counted externally of the semiconductor memory device, then the amount of time required for error counting is reduced, but the device is not able to obtain pass/error information of all bits
Solution Approach 1:
The patent combines the error bit counting functionality with the internal memory device structure by integrating the error bit detection unit and bit counting unit within the memory device itself. This merging allows the device to obtain pass/error information of all bits internally while maintaining efficient error counting capabilities, resolving the contradiction between external counting speed and information completeness.
Solution Approach 2:
The patent introduces an intermediary error bit detection unit that operates within the memory device to generate error bit data, which is then processed by the bit counting unit. This intermediary mechanism enables comprehensive error information collection without requiring external counting for each bit, thus obtaining complete pass/error information efficiently.
2Loss of information
If the semiconductor memory device includes internal error bit detection and counting units, then pass/error information of all bits can be obtained, but the device complexity increases
Solution Approach 1:
The error bit detection unit and bit counting unit are designed with multi-functionality, allowing them to serve multiple purposes within the memory device. The error bit detection unit not only detects errors but also generates comprehensive pass/error information, while the bit counting unit can count both error bits and pass bits. This universality reduces the need for separate dedicated circuits for each function, thereby managing device complexity while achieving complete error information collection.
3Ease of operation
If error bits are counted externally, then the measurement process is simpler, but the reliability of error detection is reduced
Solution Approach 1:
The patent implements self-service by enabling the semiconductor memory device to perform error bit detection and counting internally through its own integrated units. The error bit detection unit automatically detects errors in read data by comparing with expected data, and the bit counting unit automatically counts error bits or pass bits. This self-service mechanism enhances error detection reliability by eliminating external intervention while maintaining operational simplicity through automated processes.
Data Source
AI summary
A semiconductor memory device includes an error bit detection unit and a bit counting unit. The error bit detection unit detects whether each bit in read data and each bit in expected data of the semiconductor memory device are consistent, and outputs the error bit data indicating pass/error information. The pass/error information indicates whether each detected bit is consistent. The bit counting unit counts the number of error bits in the error bit data indicating an inconsistency between the read data and the expected data, or counts the number of pass bits in the error bit data indicating consistency between the read data and the expected data. Furthermore, the semiconductor memory device also includes an interface for a read operation to input external expected values and an interface for the read operation interfaces to output the number of error bits or pass bits instead of the read data.


