Semiconductor Memory Error Correction With Time-Based Code Switching
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Solution Overview
Problem
Existing semiconductor memory devices with high error correction performance waste power by using extensive circuitry and consuming more energy than necessary, especially when data is stored for short periods, and require larger data blocks for error correction, increasing power consumption.
Innovation Solution
A semiconductor memory device with a temporary storage circuit and error correction code generators that store data in rows and columns, using CRC, ECC, and RS codes to detect and correct errors efficiently, allowing for adaptive error correction performance based on elapsed time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a correction mechanism having high error correction performance is always used, then error correction capability is improved, but power consumption increases
Solution Approach 1:
The patent implements dynamic error correction by switching between different correction mechanisms based on the elapsed time since data storage. When the elapsed time is short, a simple correction mechanism with low power consumption is used. When the elapsed time is long, a high-performance correction mechanism is activated to handle increased error rates. This dynamic adaptation resolves the contradiction by matching the correction performance to the actual need, avoiding unnecessary power consumption while maintaining reliability.
Solution Approach 2:
The patent changes the parameter of correction performance based on the elapsed time parameter. By monitoring how long data has been stored, the system adjusts the level of error correction applied - using minimal correction for recently stored data and full correction for older data. This parameter-based adaptation allows the system to maintain high reliability when needed while minimizing power consumption during normal operation.
2Reliability
If error correcting code is generated in units of large data blocks (e.g., 4 k-byte), then error correction performance is improved, but power consumption increases due to reading larger data blocks
Solution Approach 1:
The patent segments the error correction process into two levels: column-wise correction using ECC codes for small data units, and row-wise correction using RS codes for larger data blocks. This segmentation allows the system to apply appropriate correction strength to each segment based on its error probability, avoiding the need to always read and process entire large data blocks for correction, thus reducing power consumption while maintaining correction performance.
Solution Approach 2:
The patent applies partial error correction by first using ECC codes to correct errors in individual columns, then using RS codes to correct remaining errors in rows. This partial action approach corrects only the necessary portions of data rather than applying full correction to entire large blocks, reducing the amount of data that must be read and processed, thereby lowering power consumption while achieving the required correction performance.
Data Source
AI summary
A semiconductor memory device includes a temporary storage circuit configured to receive data items and store the data items in rows and columns, a detecting code generator configured to generate first detecting codes used to detect errors in the data items, respectively, a first correcting code generator configured to generate first correcting codes used to correct errors in first data blocks corresponding to the columns, respectively, each of the first data blocks containing data items that are arranged in a corresponding one of the columns, and a second correcting code generator configured to generate second correcting codes used to correct errors in second data blocks corresponding to the rows, respectively, each of the second data blocks containing data items that are arranged in a corresponding one of the rows.