Memory Error Correction via Address-Based Data Rotation
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Solution Overview
Problem
Existing memory technologies face challenges in reducing errors during error correction, particularly as the capacity of memories increases and defective memory cells become more common.
Innovation Solution
The proposed solution involves a memory system that includes a data receiving circuit, a data rotation circuit, an error correction code generation circuit, and a memory core. During write operations, the data rotation circuit changes the order of data based on an address, and the error correction code generation circuit generates an error correction code using a check matrix. This setup allows for effective error correction during read operations by using the same check matrix, which can be adjusted based on the address to prevent miscorrection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a fixed error correction code generation method is used, then the error correction circuit is simple, but miscorrection occurs when data is stored at different addresses
Solution Approach 1:
The check matrix is dynamically changed based on the address where data is to be stored. The error correction code generation circuit selects different check matrices according to the address, allowing the error correction behavior to adapt to different storage locations and prevent miscorrection
Solution Approach 2:
The parameters of the error correction code generation are changed by selecting different check matrices based on the address. This parameter change allows the same error correction circuit to generate appropriate error correction codes for different data locations without requiring additional hardware
2Reliability
If data is stored in fixed order, then the storage structure is simple, but error correction cannot account for address-specific patterns
Solution Approach 1:
The data rotation circuit performs preliminary rotation of data bits before storage based on the address. This preliminary action ensures that when data is later retrieved and error correction is applied, the check matrix can properly correlate with the data position, preventing miscorrection
Solution Approach 2:
Different rotation amounts are applied based on the address, creating an asymmetric data arrangement that corresponds to the address-specific check matrix selection. This asymmetry allows the error correction system to distinguish between different data locations
Data Source
AI summary
A memory includes: a data receiving circuit suitable for receiving a data during a write operation; a data rotation circuit suitable for changing an order of the data transferred from the data receiving circuit and outputting the data whose order is changed in response to an address during the write operation; an error correction code generation circuit suitable for generating an error correction code based on the data output from the data rotation circuit during the write operation; and a memory core suitable for storing the data received by the data receiving circuit and the error correction code during the write operation.