Semiconductor Memory Device Error Correction Circuit
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current semiconductor memory devices face challenges in ensuring the reliability and reducing unnecessary writing operations, which can lead to degradation and increased power consumption, especially during write-back operations.
Innovation Solution
The semiconductor memory device incorporates an error checking and correcting (ECC) circuit that generates and uses parity bits for data correction, allowing for parallel writing and write-back operations initiated by a pre-charge command, thereby preventing interruptions and reducing unnecessary writes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If write-back operations are performed frequently to ensure data reliability, then data reliability is improved, but power consumption increases and memory degradation accelerates
Solution Approach 1:
The system performs self-diagnosis through the diagnosis circuit that automatically detects whether write-back operations are actually needed by checking data integrity, eliminating the need for frequent unnecessary write-back operations and reducing power consumption while maintaining reliability
Solution Approach 2:
The diagnosis circuit provides feedback information about data integrity status to control whether write-back operations are executed, allowing the system to adaptively perform write-backs only when necessary rather than following a fixed schedule
2Reliability
If write-back operations are performed frequently to ensure data reliability, then data reliability is improved, but memory cell degradation increases
Solution Approach 1:
The diagnosis circuit enables the memory system to self-assess data integrity and determine whether write-back operations are necessary, reducing unnecessary write operations that cause memory cell degradation while maintaining data reliability through targeted corrections
3Reliability
If error correction is performed continuously to maintain data integrity, then data integrity is improved, but processing time increases
Solution Approach 1:
Instead of continuous error correction, the system performs periodic diagnosis operations at intervals to check data integrity, executing error correction only when diagnostic checks indicate errors are present, thereby reducing overall processing time while maintaining data integrity
Data Source
AI summary
According to one embodiment, a semiconductor memory device includes a memory cell, a read circuit, a correcting circuit and a write circuit. The read circuit is configured to read first data from the memory cell by receiving a first command. The correcting circuit is configured to generate second data by correcting an error included in the first data. The write circuit is configured to write the second data to the memory cell in response to receiving a second command.