Memory Error Correction Circuit with Mode Bit for Reducing Accumulation
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Solution Overview
Problem
As memory device capacity increases, it becomes challenging to fabricate devices without defective memory cells, leading to errors during read and write operations, which existing error correction methods struggle to effectively manage.
Innovation Solution
A method and system for a memory device that includes an error correction circuit and a modify circuit to correct errors by generating new data and error correction codes during read-modify-write operations, with two modes to manage error accumulation, one mode writing new data and codes, and the other mode masking errors to prevent accumulation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If error correction codes are generated and written back to memory during read-modify-write operations, then data integrity is improved, but error accumulation in memory core increases
Solution Approach 1:
The patent extracts the harmful effect (error accumulation) from the system by introducing a mode bit that separates error correction operations from normal write operations. When the mode bit is set, error correction codes are generated but not written back to memory, effectively removing the harmful accumulation effect while preserving data integrity through correction during read operations
Solution Approach 2:
The patent applies dynamics by making the error correction behavior configurable through a mode bit. The system can dynamically switch between two modes: normal mode where error correction codes are written back, and error accumulation prevention mode where they are not. This dynamic control allows the system to adapt its error correction strategy based on operational context
2Reliability
If redundant memory cells are included to replace defective cells, then manufacturing yield is improved, but device complexity increases
Solution Approach 1:
The patent applies self-service by implementing automatic error detection and correction functionality within the memory device itself. The error correction circuit automatically detects and corrects errors without external intervention, and the system self-manages the complexity of error handling through the mode bit mechanism, eliminating the need for complex external error management systems
Data Source
AI summary
A method for operating a memory includes: reading data and an error correction code from a memory core; correcting an error of the read data based on the read error correction code to produce error-corrected data; generating new data by replacing a portion of the error-corrected data with write data, the portion becoming a write data portion; generating a new error correction code based on the new data; and writing the write data portion of the new data and the new error correction code into the memory core.