Semiconductor Memory Device Error Detection via Data Comparison
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Solution Overview
Problem
Semiconductor memory devices face challenges in ensuring the reliability of program operations due to the lack of effective error detection mechanisms, leading to potential data corruption and storage issues.
Innovation Solution
A semiconductor memory device with a control logic system that compares program data with read data to detect errors during program operations, allowing for re-programming on different memory locations when errors are detected, thereby enhancing operation reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If non-volatile memory devices are used to retain data without power, then data retention capability is improved, but write and read speeds deteriorate
Solution Approach 1:
The patent segments the memory system into volatile memory cells for fast data storage and a separate error detection mechanism for reliability verification. The read and write circuit temporarily stores program data during programming, while control logic independently verifies data integrity through counting operations, allowing the system to maintain fast access speeds while ensuring data retention reliability.
2Reliability
If error detection mechanisms are added to program operations, then operation reliability is improved, but device complexity increases
Solution Approach 1:
The error detection mechanism uses the existing program data and read data already present in the read and write circuit to perform self-verification through counting operations. The control logic counts first data bits in program data, programs memory cells, reads back the data, counts first data bits in read data, and compares the counts to detect errors. This self-service approach verifies data integrity without requiring additional external verification equipment or complex processing logic.
3Reliability
If data is verified by comparing program data with read data, then error detection capability is improved, but operation time increases
Solution Approach 1:
The patent performs partial verification by counting only the first data bits (most significant bits) of the program data and read data for error detection, rather than verifying the entire data set. This partial action approach provides sufficient error detection capability for critical data integrity checks while minimizing the time required for verification operations, as counting a subset of data bits is faster than processing complete data words.
Data Source
AI summary
A semiconductor memory device includes a memory cell array including a plurality of memory cells, a read and write circuit temporarily storing program data to be programmed into the memory cell array during a program operation, and reading data stored in the memory cell array and temporarily storing read data during a read operation, and a control logic detecting an error in the program operation by comparing the program data with the read data.