Early Detection of Execution Errors in Memory Operations

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Solution Overview

Problem

Current error reporting in non-volatile memory operations, such as in embedded multimedia card (eMMC) flash memory, often results in data corruption due to delayed communication of write-protect errors, where a host device is falsely notified of successful write operations despite errors occurring in write-protected areas.

Innovation Solution

Implementing a method where errors are detected and communicated through a specific bit pattern on data lines before sending another command, allowing for immediate notification of write errors during memory operations, thereby preventing data corruption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If error detection is performed during memory operations, then reliability is improved, but communication delay increases because errors are detected after the operation completes

Engineering Contradiction:
Improveerror detection capabilityVSAvoiderror communication delay
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies preliminary action by sampling data lines during the memory operation execution period to detect errors before the operation completes. The controller samples the data lines at specific timing points (e.g., after write operations) to detect write-protect errors early, allowing error notification to occur before the host device issues the next command, thus reducing communication delay while maintaining reliability

Inventive Principle:
Principle #10Preliminary action

2Measurement precision

If continuous monitoring of data lines is implemented, then measurement precision is improved, but energy consumption increases

Engineering Contradiction:
Improveerror detection accuracyVSAvoidmonitoring energy consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent applies periodic action by sampling data lines at specific intervals and timing points during memory operations rather than continuously monitoring them. The controller samples data lines at critical moments (e.g., after write operations complete) to detect errors with high precision while consuming minimal energy, avoiding the need for continuous monitoring

Inventive Principle:
Principle #19Periodic action

3Device complexity

If error communication is delayed until after host device commands are processed, then device complexity is reduced, but data corruption risk increases

Engineering Contradiction:
Improveerror communication protocol simplicityVSAvoiddata corruption risk
Core Design Contradiction:
Device complexityVSObject-affected harmful factors

Solution Approach 1:

The patent applies preliminary action by notifying the host device of errors before the host device processes subsequent commands. The controller detects errors during operation execution and communicates them immediately through the data lines, preventing the host device from issuing commands that could corrupt data based on incorrect assumptions about previous operation success

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10949278B2Early detection of execution errors
Publication Date: 2021.03.16 QUALCOMM INC
  • US10949278B2 patent drawing
  • US10949278B2 patent drawing
  • US10949278B2 patent drawing

AI summary

Certain aspects of the present disclosure provide apparatus and techniques for communicating error information during memory operations. For example, certain aspects of the present disclosure may provide a method for memory operations. The method generally including receiving a command from a host device, performing memory operations corresponding to the command received from the host device, detecting an error during the memory operations, and communicating the error based on the detection, wherein the error is communicated before receiving another command from the host device.