Memory Error-Handling Flow Reordering for Lower Latency

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Solution Overview

Problem

Conventional memory sub-systems employ static error-handling flows that fail to adapt to changing operating conditions, leading to inefficiencies such as increased latency and degraded performance due to the inability to consider latency measurements at a host or global level.

Innovation Solution

Implementing a system controller capable of adaptively adjusting error-handling operations using machine-learning models that optimize error-handling flows based on real-time data and workload patterns, dynamically reordering operations to minimize latency and improve performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If static error-handling flows are used in memory sub-systems, then device complexity is reduced and ease of operation is improved, but latency increases and performance degrades due to inability to adapt to changing operating conditions

Engineering Contradiction:
Improveease of operationVSAvoidlatency
Core Design Contradiction:
Ease of operationVSLoss of time

Solution Approach 1:

The patent implements dynamic error-handling flows that automatically adjust the sequence of error-handling operations based on real-time operating conditions, workload patterns, and historical performance data. This transforms the static, fixed sequence into a dynamic, adaptive sequence that optimizes latency performance while maintaining ease of operation through automated control.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system incorporates feedback mechanisms that monitor operating conditions, error rates, and latency measurements, then use this information to adjust the error-handling flow sequence. This closed-loop feedback enables the system to adapt to changing conditions and optimize performance without requiring manual intervention.

Inventive Principle:
Principle #23Feedback

2Loss of time

If adaptive error-handling flows using machine-learning models are implemented, then latency is reduced and performance is improved, but device complexity increases

Engineering Contradiction:
ImprovelatencyVSAvoiddevice complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The patent introduces machine-learning models as intermediary components that bridge the gap between raw operating data and error-handling decisions. These models process complex patterns and recommendations, translating them into actionable flow sequence adjustments without requiring the core memory subsystem to become inherently more complex.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The system implements self-service capabilities where the error-handling flow automatically optimizes itself using embedded machine-learning models and real-time data. This self-optimizing behavior reduces the need for external configuration and management, offsetting the added complexity through automated self-management.

Inventive Principle:
Principle #25Self-service

3Loss of energy

If conventional static error-handling flows are used, then power consumption is higher and device lifespan is reduced, but the system remains simpler to implement

Engineering Contradiction:
Improvepower consumptionVSAvoiddevice complexity
Core Design Contradiction:
Loss of energyVSDevice complexity

Solution Approach 1:

The patent implements dynamic error-handling flows that adapt the sequence of operations based on real-time conditions, enabling the system to minimize power-consuming operations when possible and extend device lifespan through optimized access patterns. This dynamic adaptation reduces unnecessary power consumption and wear without requiring complex manual configuration.

Inventive Principle:
Principle #15Dynamics

4Adaptability or versatility

If static error-handling flows are employed, then the system is easier to implement and maintain, but it cannot adapt to changing operating conditions leading to degraded performance

Engineering Contradiction:
ImproveadaptabilityVSAvoiddevice complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The system incorporates feedback mechanisms that continuously monitor operating conditions, workload patterns, and performance metrics, then use this information to dynamically adjust the error-handling flow sequence. This feedback-driven adaptation enables the system to respond to changing conditions automatically, achieving high adaptability through automated control loops.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The error-handling system implements self-service capabilities where machine-learning models and real-time data enable automatic optimization of the flow sequence. This self-optimizing behavior provides adaptability to changing conditions without requiring external intervention or complex manual configuration, as the system manages its own optimization autonomously.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS12530123B2Adaptive optimization of error-handling flows in memory devices
Publication Date: 2026.01.20 MICRON TECHNOLOGY INC
  • US12530123B2 patent drawing
  • US12530123B2 patent drawing
  • US12530123B2 patent drawing

AI summary

Systems and methods are disclosed including a memory device and a processing device operatively coupled to the memory device. The processing device can perform operations including sending, to a device that provides error-handling flow optimization, an ordered set of error-handling operations to be performed to recover data residing in a segment of the memory device; receiving, from the device that provides the error-handling flow optimization, a reordered set of error-handling operations, wherein the reordered set adjusts an order of one or more error-handling operations of the ordered set of error-handling operations, wherein the reordered set is obtained by applying the ordered set of error-handling operations to a trained machine learning model, wherein the trained machine learning model is based on latency data for previously-performed error-handling operations, and wherein the latency data for the previously-performed error-handling operations depends on a workload of the segment of the memory device; and performing one or more error-handling operations of the reordered set of error-handling operations to the data residing in the segment of the memory device.