Semiconductor Memory Error Repair Using Dedicated Regions
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Solution Overview
Problem
As semiconductor systems increase in capacity, their reliability and yield deteriorate, and existing error correcting codes (ECC) can complicate data synchronization after error repair, leading to resource inefficiencies and delays.
Innovation Solution
A semiconductor memory device with a memory cell array comprising normal, error information, and redundancy regions, along with error detection and repair units, minimizes resource usage by detecting errors and storing error location information to facilitate efficient repair operations without significant logic or delay circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an ECC circuit is added to correct errors in data, then reliability of data is improved, but area of the semiconductor memory device increases
Solution Approach 1:
The patent extracts the error correction functionality from a traditional ECC circuit and implements it using existing memory structure components (normal region, error information region, and redundancy region). The error information is stored in the error information region rather than requiring separate ECC circuit logic, thereby achieving error correction without increasing device area.
Solution Approach 2:
The memory cell array is designed to serve multiple functions: the normal region stores data, the error information region stores error detection data, and the redundancy region provides replacement capacity. This multi-functional design allows error correction to be performed using the existing memory structure rather than requiring dedicated ECC circuitry.
2Reliability
If an ECC circuit is added to correct errors, then reliability is improved, but device complexity increases
Solution Approach 1:
The patent removes the need for complex ECC circuit logic by extracting the error correction function and implementing it through memory structure operations. The error detection and correction are performed by comparing data with error information stored in the error information region and replacing defective data using the redundancy region, eliminating the need for separate ECC circuitry.
Solution Approach 2:
The memory device performs self-diagnosis and self-repair by using its own internal structures. The error information region contains data that enables the device to detect errors, and the redundancy region provides the means for self-repair, eliminating the need for external or separate correction circuits.
3Reliability
If error correction is performed on input/output data, then reliability is improved, but data synchronization becomes difficult
Solution Approach 1:
The patent performs preliminary error detection by storing error information in the error information region during data writing. This allows error detection to be performed before data is read out, and corrections can be made in advance using the redundancy region, ensuring that synchronized data is always available without disrupting the data flow.
Solution Approach 2:
The error information region acts as an intermediary that stores error detection data without interfering with the normal data flow. This intermediary structure allows error detection and correction to occur separately from the main data input/output operations, maintaining synchronization while improving reliability.
Data Source
AI summary
A semiconductor memory device includes a memory cell array including a normal region for storing a plurality of data, an error information region for storing a plurality of error information data corresponding to the plurality of normal data, respectively, and a redundancy region for replacing the normal region, an error detection unit suitable for detecting an error on the plurality of data in response to the plurality of error information data, and storing an error location information, which indicates a storage region of a data having an error in the normal and redundancy regions, based on an error detection result, and a repair operation unit suitable for replacing the storage region, which is indicated by the error location information, by the redundancy region during a repair operation period.