Memory Error Tracking via Address Range Segmentation

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Solution Overview

Problem

Current computer systems lack effective methods for tracking address ranges of memory errors, which limits their ability to identify and correct errors accurately, leading to reduced memory reliability and predictability.

Innovation Solution

The system detects memory errors by memory logic, reports them to memory firmware, identifies affected address ranges through scanning, determines region size based on the error, and populates a mark table with region size and match address information, enabling better error tracking and correction.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If memory error tracking is implemented without address range identification, then error detection capability is maintained, but error correction accuracy and memory reliability deteriorate

Engineering Contradiction:
Improvememory reliabilityVSAvoiderror location precision
Core Design Contradiction:
ReliabilityVSMeasurement precision

Solution Approach 1:

The patent segments the memory address space into distinct address ranges by scanning memory in dependence upon the detected error address. The mark table stores multiple entries, each representing a segmented address range with start and end addresses. This segmentation allows precise identification of which specific memory regions are affected by errors, transforming a single undifferentiated error detection capability into multiple targeted error tracking capabilities across different memory segments.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a new dimension of error tracking by maintaining not just error counts but also address range information (start address, end address, region size) in the mark table. This dimensional expansion from simple error counting to structured address range tracking enables both high-level reliability monitoring and precise error location identification simultaneously.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Measurement precision

If comprehensive memory scanning is performed to identify affected address ranges, then error tracking accuracy is improved, but system complexity and processing time increase

Engineering Contradiction:
Improveerror range identification accuracyVSAvoidmemory firmware complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent performs preliminary memory scanning action immediately when an error is detected, proactively identifying the full address range affected by the error before normal memory operations continue. By scanning memory in dependence upon the detected error address and determining the complete affected region, the system prepares accurate error tracking information in advance, preventing future errors in the same region and avoiding the need for more complex real-time analysis later.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The mark table serves as an intermediary data structure between error detection and error correction processes. It stores organized address range information (start address, end address, region size, match address) that mediates between the raw error detection data and the higher-level error correction decisions, simplifying the overall system architecture while maintaining high precision error tracking.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If mark table is populated with detailed address range information, then error correction capability is enhanced, but memory firmware processing load increases

Engineering Contradiction:
Improveerror correction capabilityVSAvoidfirmware processing efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies local quality by storing detailed address range information (start address, end address, region size) only for memory regions that have actually experienced errors, rather than maintaining uniform detailed tracking for all memory. The mark table dynamically populates entries only where needed, allowing the system to maintain high error correction capability for affected regions while minimizing processing overhead for regions without errors.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the parameters stored in the mark table from simple error counts to structured address range parameters (start address, end address, region size, match address). This parameter transformation enables the system to make more informed error correction decisions based on the specific characteristics of each affected memory region, improving correction capability while the structured format maintains processing efficiency through consistent data organization.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11017875B2Tracking address ranges for computer memory errors
Publication Date: 2021.05.25 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US11017875B2 patent drawing
  • US11017875B2 patent drawing
  • US11017875B2 patent drawing

AI summary

Tracking address ranges for computer memory errors including detecting, by memory logic, an error at a memory address, the memory address representing one or more memory cells at a physical location of computer memory; reporting, by the memory logic to memory firmware, the detected error including providing the memory firmware with the memory address; identifying, by the memory firmware, an address range affected by the detected error including scanning the computer memory in dependence upon the memory address; determining, by the memory firmware, a region size based on the address range affected by the detected error; and populating an entry in a mark table corresponding to the detected error, including populating a field specifying the region size and a field specifying a match address corresponding to the memory address.