Semiconductor Memory Etching Equipotentiality
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Solution Overview
Problem
In three-dimensional semiconductor memory devices, achieving high shape controllability during the Reactive Ion Etching (RIE) process is challenging, leading to potential defects such as short-circuiting due to uneven etching and non-uniform slit widths, which affects the reliability and yield of the memory cells.
Innovation Solution
The method involves simultaneously forming first and second slits in a stacked body using a mask layer, where the first slits create a comb-shaped pattern and the second slits surround it, ensuring all line parts have a uniform width by maintaining a floating potential and reducing potential differences, thereby enhancing etching control and preventing side etching imbalances.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If RIE method is used to form slits and memory holes in stacked body, then etching capability is achieved, but shape controllability deteriorates leading to non-uniform etching and slit widths
Solution Approach 1:
The patent applies equipotentiality by forming a conductive film layer that connects all line parts (first slits) to a common potential, eliminating potential differences between adjacent slits. This prevents plasma potential variations during RIE processing, ensuring uniform etching rates and consistent slit widths across the entire stacked body, thereby resolving the contradiction between shape controllability and etching uniformity.
2Productivity
If conventional RIE processing is performed, then memory holes are formed, but potential differences between line parts cause side etching imbalances and short-circuiting
Solution Approach 1:
The conductive film layer serves as an equipotential structure that equalizes the electrical potential across all line parts during RIE processing. By preventing potential differences, it eliminates side etching imbalances and short-circuiting defects, thereby improving yield while maintaining productivity in memory cell formation.
Solution Approach 2:
The conductive film layer acts as an intermediary element between the line parts and the plasma environment during RIE. It mediates the electrical potential distribution, ensuring uniform plasma interaction across all slits and memory holes, which prevents defects and improves manufacturing reliability.
3Productivity
If multiple slits are formed simultaneously with comb-shaped pattern, then manufacturing efficiency is improved, but uniformity of slit widths deteriorates due to potential differences
Solution Approach 1:
The conductive film layer creates an equipotential network that connects all simultaneously formed slits, ensuring they experience identical electrical conditions during RIE processing. This eliminates potential differences that would otherwise cause slit width variations, maintaining manufacturing precision while enabling high-productivity simultaneous patterning.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves the uniformity of slit widths, increases the yield, and enhances the reliability of the semiconductor memory device by preventing defects like short-circuiting, resulting in more consistent and reliable memory cell formation.
Implementation Method 1
maintaining a floating potential and reducing potential differences, thereby enhancing etching control
Implementation Method 2
forming a first slit and a second slit simultaneously by dry-etching the stacked body using a mask layer
Data Source
AI summary
According to one embodiment, a method for manufacturing a semiconductor memory device includes forming a stacked body including a plurality of first layers and a plurality of second layers on a substrate. The method includes forming a first slit and a second slit simultaneously by dry-etching the stacked body. The first slit causes a part of the stacked body to have a comb-shaped pattern including a plurality of line parts isolated in a first direction and extending in a second direction. The second slit surrounds the comb-shaped pattern with a closed pattern. The method includes forming a hole in the line parts of the stacked body. The method includes forming a charge storage film and a semiconductor body in the hole.