Memory Expansion Mapping Module for Logical to Physical Address Translation
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Solution Overview
Problem
Conventional main memory systems face limitations in expanding memory capacity due to constraints on the number of physical ranks directly attachable to the memory controller, necessitating a method to effectively map logical memory locations to physical memory locations across multiple memory modules.
Innovation Solution
A system and method for memory expansion that utilizes a mapping module to map logical memory addresses to physical memory addresses, allowing memory commands to be distributed across multiple physical ranks, and includes error correction and data path management to ensure accurate data flow and error reporting.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory capacity is expanded by adding more physical ranks, then memory capacity increases, but the number of directly attachable physical ranks to the memory controller is limited
Solution Approach 1:
A mapping module is introduced as an intermediary component between the memory controller and multiple physical memory ranks. The mapping module receives memory commands from the memory controller, translates logical memory addresses to physical memory addresses, and distributes commands to the appropriate physical ranks. This intermediary enables the memory controller to access more memory capacity than it could directly address, resolving the contradiction between limited direct attachability and desired memory expansion.
Solution Approach 2:
The memory system is segmented into logical memory spaces and physical memory ranks through the mapping module. The mapping module divides the address translation task into segments, managing multiple physical ranks independently while presenting a unified logical memory space to the memory controller. This segmentation allows memory capacity to be expanded across multiple physical ranks without increasing the direct attachment limit at the controller level.
2Quantity of substance
If logical memory addresses are mapped to physical memory addresses across multiple ranks, then memory capacity utilization improves, but address mapping complexity increases
Solution Approach 1:
The mapping module serves as an intermediary that handles the complex address mapping task, shielding the memory controller from the complexity of managing multiple physical ranks. The mapping module implements the address translation logic internally, converting simple logical addresses from the controller into the appropriate physical addresses for distributed memory ranks, thereby improving capacity utilization without exposing mapping complexity to the controller.
Solution Approach 2:
The mapping module maintains mapping tables that store the correspondence between logical and physical addresses. These tables act as copied representations of the memory layout, allowing the mapping module to quickly translate addresses without requiring the memory controller to understand the underlying physical memory organization. This copying mechanism simplifies the interface while enabling complex address mapping.
3Productivity
If memory commands are distributed across multiple physical ranks, then memory bandwidth and capacity increase, but command distribution and data path management complexity increases
Solution Approach 1:
The mapping module acts as an intermediary command distributor that receives memory commands from the memory controller and intelligently routes them to the appropriate physical ranks. This centralized command management simplifies the distribution process by providing a single point of control, while still enabling parallel command execution across multiple ranks to maintain high memory bandwidth.
Solution Approach 2:
The mapping module dynamically adjusts command distribution based on the current memory state and access patterns. It can adaptively route commands to different physical ranks depending on factors such as cache status, memory bank availability, and access frequency, thereby optimizing memory bandwidth utilization while managing the complexity of multi-rank coordination through flexible, state-aware decision-making.
Data Source
AI summary
This document discusses, among other things, an example system and methods for memory expansion. An example embodiment includes receiving a memory request from a memory controller over a channel. Based on the memory request, the example embodiment includes selecting a location in memory to couple to a sub-channel of the channel and configuring the set of field effect transistors to couple the channel with the sub-channel. In the example embodiment, data may be allowed to flow between the memory controller and the location in the memory over the channel and the sub-channel.