Semiconductor Memory Device Fail Sensing Unit for Peripheral Circuit Failure Detection

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Solution Overview

Problem

Semiconductor memory devices face challenges in efficiently detecting and isolating failures within their peripheral circuits, particularly in the 'peri-under cell' (PUC) region, which complicates troubleshooting and increases testing time due to the presence of the memory cell array.

Innovation Solution

Incorporating a fail sensing unit between the PUC and non-PUC regions to determine whether a failure occurred in the PUC or non-PUC region, allowing for targeted troubleshooting and reducing testing time.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a fail sensing unit is incorporated to detect failures in PUC and non-PUC regions, then measurement precision of failure location is improved, but device complexity increases

Engineering Contradiction:
Improvefailure location detectionVSAvoidcircuit structure
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The peripheral circuit is segmented into two distinct regions: PUC (peri-under cell) region and non-PUC region. The fail sensing unit is configured to independently detect failures in each region by applying different voltages to word lines associated with each region and measuring current flow. This segmentation enables precise localization of failures without requiring a complete redesign of the entire circuit, thus improving measurement precision while managing device complexity through structured division.

Inventive Principle:
Principle #1Segmentation

2Area of stationary object

If the memory cell array is present in the PUC region, then area utilization is improved, but difficulty of detecting and measuring failures increases

Engineering Contradiction:
Improveperipheral circuit areaVSAvoidfailure detection
Core Design Contradiction:
Area of stationary objectVSDifficulty of detecting and measuring

Solution Approach 1:

The fail sensing unit acts as an intermediary between the memory cell array and the testing system. It includes sensing circuits that can selectively activate word lines corresponding to either PUC or non-PUC regions and measure the resulting current. This intermediary structure enables clear distinction between failures originating in the memory cell array versus those in the peripheral circuit, reducing the difficulty of detecting and measuring failures despite the integrated layout.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Productivity

If targeted troubleshooting is implemented by region, then productivity is improved, but device complexity increases

Engineering Contradiction:
Improvetesting efficiencyVSAvoidcontrol structure
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The fail sensing unit performs preliminary detection and classification of failures by region before detailed troubleshooting begins. By pre-identifying whether a failure occurs in the PUC or non-PUC region through selective voltage application and current measurement, the system prepares targeted diagnostic information in advance. This preliminary action streamlines subsequent troubleshooting activities, improving productivity while the control structure remains manageable through automated regional classification.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10020070B2Semiconductor memory device and method of operating the same
Publication Date: 2018.07.10 MIMIRIP LLC
  • US10020070B2 patent drawing
  • US10020070B2 patent drawing
  • US10020070B2 patent drawing

AI summary

Provided herein are a semiconductor memory device and a method of operating the same. The semiconductor memory device includes: a memory cell array including a plurality of memory cells; a peripheral circuit configured to control the memory cell array, the peripheral circuit including a first region disposed under the memory cell array and a second region; and a fall sensing unit configured to sense whether a failure has occurred in the first or the second regions.